diff mbox series

[PATCHv1,1/1] arm64: dts: rockchip: rk3588: add thermal sensor

Message ID 20230404154429.51601-1-sebastian.reichel@collabora.com (mailing list archive)
State New, archived
Headers show
Series [PATCHv1,1/1] arm64: dts: rockchip: rk3588: add thermal sensor | expand

Commit Message

Sebastian Reichel April 4, 2023, 3:44 p.m. UTC
Add thermal sensor IP, which allows monitoring temperatures at
seven different places in the SoC:

* Chip Center
* CPU Cluster 1 (Dual A76 "Big" Cores)
* CPU Cluster 2 (Dual A76 "Big" Cores)
* CPU Cluster 0 (Quad A55 "Little" Cores)
* Power Domain Center
* Graphics Processing Unit
* Neural Processing Unit

Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
---
The driver + dt-binding part has been merged by Daniel Lezcano,
so let's add the DT node.
---
 arch/arm64/boot/dts/rockchip/rk3588s.dtsi | 20 ++++++++++++++++++++
 1 file changed, 20 insertions(+)

Comments

Heiko Stuebner April 5, 2023, 5:46 p.m. UTC | #1
On Tue, 4 Apr 2023 17:44:29 +0200, Sebastian Reichel wrote:
> Add thermal sensor IP, which allows monitoring temperatures at
> seven different places in the SoC:
> 
> * Chip Center
> * CPU Cluster 1 (Dual A76 "Big" Cores)
> * CPU Cluster 2 (Dual A76 "Big" Cores)
> * CPU Cluster 0 (Quad A55 "Little" Cores)
> * Power Domain Center
> * Graphics Processing Unit
> * Neural Processing Unit
> 
> [...]

Applied, thanks!

[1/1] arm64: dts: rockchip: rk3588: add thermal sensor
      commit: 32641b8ab1a5bd08e898cec3d46a8ecb4b4e895e

Best regards,
diff mbox series

Patch

diff --git a/arch/arm64/boot/dts/rockchip/rk3588s.dtsi b/arch/arm64/boot/dts/rockchip/rk3588s.dtsi
index 7840767dfcd8..c51f766cbd2e 100644
--- a/arch/arm64/boot/dts/rockchip/rk3588s.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3588s.dtsi
@@ -1589,6 +1589,26 @@  pwm15: pwm@febf0030 {
 		status = "disabled";
 	};
 
+	tsadc: tsadc@fec00000 {
+		compatible = "rockchip,rk3588-tsadc";
+		reg = <0x0 0xfec00000 0x0 0x400>;
+		interrupts = <GIC_SPI 397 IRQ_TYPE_LEVEL_HIGH 0>;
+		clocks = <&cru CLK_TSADC>, <&cru PCLK_TSADC>;
+		clock-names = "tsadc", "apb_pclk";
+		assigned-clocks = <&cru CLK_TSADC>;
+		assigned-clock-rates = <2000000>;
+		resets = <&cru SRST_P_TSADC>, <&cru SRST_TSADC>;
+		reset-names = "tsadc-apb", "tsadc";
+		rockchip,hw-tshut-temp = <120000>;
+		rockchip,hw-tshut-mode = <0>; /* tshut mode 0:CRU 1:GPIO */
+		rockchip,hw-tshut-polarity = <0>; /* tshut polarity 0:LOW 1:HIGH */
+		pinctrl-0 = <&tsadc_gpio_func>;
+		pinctrl-1 = <&tsadc_shut>;
+		pinctrl-names = "gpio", "otpout";
+		#thermal-sensor-cells = <1>;
+		status = "disabled";
+	};
+
 	i2c6: i2c@fec80000 {
 		compatible = "rockchip,rk3588-i2c", "rockchip,rk3399-i2c";
 		reg = <0x0 0xfec80000 0x0 0x1000>;