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Thu, 13 Apr 2023 07:43:43 -0700 (PDT) Received: from localhost.localdomain ([98.58.151.237]) by smtp.googlemail.com with ESMTPSA id w14-20020ab05a8e000000b00771d1670401sm223637uae.35.2023.04.13.07.43.42 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 13 Apr 2023 07:43:43 -0700 (PDT) From: John Clark To: Heiko Stuebner , Rob Herring , Krzysztof Kozlowski , Peter Geis Cc: devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org, John Clark Subject: [PATCH] arm64: dts: rockchip: Add pinctrl gpio-ranges for rk356x Date: Thu, 13 Apr 2023 10:43:16 -0400 Message-Id: <20230413144316.4247-1-inindev@gmail.com> X-Mailer: git-send-email 2.39.2 MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20230413_074346_173876_7DFD346D X-CRM114-Status: GOOD ( 11.21 ) X-BeenThere: linux-rockchip@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: Upstream kernel work for Rockchip platforms List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "Linux-rockchip" Errors-To: linux-rockchip-bounces+linux-rockchip=archiver.kernel.org@lists.infradead.org Add gpio-range properties to the pinctrl gpio nodes in rk356x.dtsi Signed-off-by: John Clark --- arch/arm64/boot/dts/rockchip/rk356x.dtsi | 7 ++++++- 1 file changed, 6 insertions(+), 1 deletion(-) diff --git a/arch/arm64/boot/dts/rockchip/rk356x.dtsi b/arch/arm64/boot/dts/rockchip/rk356x.dtsi index 802fcc96384e..793dbcb981dc 100644 --- a/arch/arm64/boot/dts/rockchip/rk356x.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk356x.dtsi @@ -1796,11 +1796,11 @@ usb2phy1_otg: otg-port { pinctrl: pinctrl { compatible = "rockchip,rk3568-pinctrl"; + ranges; rockchip,grf = <&grf>; rockchip,pmu = <&pmugrf>; #address-cells = <2>; #size-cells = <2>; - ranges; gpio0: gpio@fdd60000 { compatible = "rockchip,gpio-bank"; @@ -1808,6 +1808,7 @@ gpio0: gpio@fdd60000 { interrupts = ; clocks = <&pmucru PCLK_GPIO0>, <&pmucru DBCLK_GPIO0>; gpio-controller; + gpio-ranges = <&pinctrl 0 0 32>; #gpio-cells = <2>; interrupt-controller; #interrupt-cells = <2>; @@ -1819,6 +1820,7 @@ gpio1: gpio@fe740000 { interrupts = ; clocks = <&cru PCLK_GPIO1>, <&cru DBCLK_GPIO1>; gpio-controller; + gpio-ranges = <&pinctrl 0 32 32>; #gpio-cells = <2>; interrupt-controller; #interrupt-cells = <2>; @@ -1830,6 +1832,7 @@ gpio2: gpio@fe750000 { interrupts = ; clocks = <&cru PCLK_GPIO2>, <&cru DBCLK_GPIO2>; gpio-controller; + gpio-ranges = <&pinctrl 0 64 32>; #gpio-cells = <2>; interrupt-controller; #interrupt-cells = <2>; @@ -1841,6 +1844,7 @@ gpio3: gpio@fe760000 { interrupts = ; clocks = <&cru PCLK_GPIO3>, <&cru DBCLK_GPIO3>; gpio-controller; + gpio-ranges = <&pinctrl 0 96 32>; #gpio-cells = <2>; interrupt-controller; #interrupt-cells = <2>; @@ -1852,6 +1856,7 @@ gpio4: gpio@fe770000 { interrupts = ; clocks = <&cru PCLK_GPIO4>, <&cru DBCLK_GPIO4>; gpio-controller; + gpio-ranges = <&pinctrl 0 128 32>; #gpio-cells = <2>; interrupt-controller; #interrupt-cells = <2>;