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Mon, 13 Nov 2023 07:07:48 -0500 (EST) Received: by feathertop.org (sSMTP sendmail emulation); Mon, 13 Nov 2023 23:07:44 +1100 From: Tim Lunn To: linux-rockchip@lists.infradead.org, devicetree@vger.kernel.org Cc: Jagan Teki , Krzysztof Kozlowski , Tim Lunn , Rob Herring , Heiko Stuebner , linux-arm-kernel@lists.infradead.org, Conor Dooley , Andi Shyti , linux-i2c@vger.kernel.org Subject: [PATCH 3/8] i2c: rk3x: Adjust grf offset for i2c2 on rv1126 Date: Mon, 13 Nov 2023 23:07:00 +1100 Message-Id: <20231113120705.1647498-4-tim@feathertop.org> X-Mailer: git-send-email 2.40.1 In-Reply-To: <20231113120705.1647498-1-tim@feathertop.org> References: <20231113120705.1647498-1-tim@feathertop.org> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20231113_040754_839935_EDDD2892 X-CRM114-Status: GOOD ( 11.83 ) X-BeenThere: linux-rockchip@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: Upstream kernel work for Rockchip platforms List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "Linux-rockchip" Errors-To: linux-rockchip-bounces+linux-rockchip=archiver.kernel.org@lists.infradead.org Rockchip RV1126 has a special case grf offset/mask for i2c2 Signed-off-by: Tim Lunn --- drivers/i2c/busses/i2c-rk3x.c | 8 ++++++-- 1 file changed, 6 insertions(+), 2 deletions(-) diff --git a/drivers/i2c/busses/i2c-rk3x.c b/drivers/i2c/busses/i2c-rk3x.c index a044ca0c35a1..83b7bf7b48a7 100644 --- a/drivers/i2c/busses/i2c-rk3x.c +++ b/drivers/i2c/busses/i2c-rk3x.c @@ -1288,8 +1288,12 @@ static int rk3x_i2c_probe(struct platform_device *pdev) return -EINVAL; } - /* 27+i: write mask, 11+i: value */ - value = BIT(27 + bus_nr) | BIT(11 + bus_nr); + if (i2c->soc_data == &rv1126_soc_data && bus_nr == 2) + /* rv1126 i2c2 set pmugrf offset-0x118, bit-4 */ + value = BIT(20) | BIT(4); + else + /* 27+i: write mask, 11+i: value */ + value = BIT(27 + bus_nr) | BIT(11 + bus_nr); ret = regmap_write(grf, i2c->soc_data->grf_offset, value); if (ret != 0) {