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Sun, 19 Nov 2023 04:13:46 -0800 (PST) Received: from U4.lan ([2a02:810b:f40:4300:7017:f42c:e243:8c57]) by smtp.gmail.com with ESMTPSA id r5-20020a056402018500b0053dec545c8fsm2523634edv.3.2023.11.19.04.13.46 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 19 Nov 2023 04:13:46 -0800 (PST) From: Alex Bee To: Vinod Koul , Kishon Vijay Abraham I , Heiko Stuebner , Rob Herring , Krzysztof Kozlowski , Conor Dooley Cc: devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org, linux-phy@lists.infradead.org, Alex Bee Subject: [PATCH v3 5/5] ARM: dts: rockchip: Make usbphy the parent of SCLK_USB480M for RK3128 Date: Sun, 19 Nov 2023 13:13:40 +0100 Message-ID: <20231119121340.109025-6-knaerzche@gmail.com> X-Mailer: git-send-email 2.42.0 In-Reply-To: <20231119121340.109025-1-knaerzche@gmail.com> References: <20231119121340.109025-1-knaerzche@gmail.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20231119_041351_305954_4C64C67B X-CRM114-Status: GOOD ( 12.27 ) X-BeenThere: linux-rockchip@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: Upstream kernel work for Rockchip platforms List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "Linux-rockchip" Errors-To: linux-rockchip-bounces+linux-rockchip=archiver.kernel.org@lists.infradead.org Without setting the parent for SCLK_USB480M the clock will use xin24m as it's default parent. While this is generally not an issue for the usb blocks to work, it becomes an issue for RK3128 since SCLK_USB480M can be a parent for other HW blocks (GPU, VPU, VIO), but they will never chose it, since it is currently always running at OSC frequency which is to slow for their needs. This sets the usb2 phy's output as SCLK_USB480M's parent and it's users can chose it if desired. Signed-off-by: Alex Bee --- Changes in v3: - moved parent assignment to the phy node arch/arm/boot/dts/rockchip/rk3128.dtsi | 2 ++ 1 file changed, 2 insertions(+) diff --git a/arch/arm/boot/dts/rockchip/rk3128.dtsi b/arch/arm/boot/dts/rockchip/rk3128.dtsi index c8844e0024dc..61b292c7c4c3 100644 --- a/arch/arm/boot/dts/rockchip/rk3128.dtsi +++ b/arch/arm/boot/dts/rockchip/rk3128.dtsi @@ -266,6 +266,8 @@ usb2phy: usb2phy@17c { clocks = <&cru SCLK_OTGPHY0>; clock-names = "phyclk"; clock-output-names = "usb480m_phy"; + assigned-clocks = <&cru SCLK_USB480M>; + assigned-clock-parents = <&usb2phy>; #clock-cells = <0>; status = "disabled";