| Message ID | 20231215122848.59534-1-stefan.nagy@ixypsilon.net (mailing list archive) |
|---|---|
| State | New |
| Headers | show |
| Series | arm64: dts: rockchip: Increase maximum frequency of SPI flash for ROCK Pi 4A/B/C | expand |
On 2023-12-15 13:28, Stefan Nagy wrote: > The ROCK Pi 4A/B/C boards come with a 32 Mbit SPI NOR flash chip (XTX > Technology Limited XT25F32) which has a maximum clock frequency of 108 > MHz. However, the Rockchip SPI controller driver limits the maximum > SPI clock frequency to 50 MHz. Use this limit for spi-max-freq. > > This patch has been tested on ROCK Pi 4A. > > Signed-off-by: Stefan Nagy <stefan.nagy@ixypsilon.net> > --- > arch/arm64/boot/dts/rockchip/rk3399-rock-pi-4a.dts | 2 +- > arch/arm64/boot/dts/rockchip/rk3399-rock-pi-4b.dts | 2 +- > arch/arm64/boot/dts/rockchip/rk3399-rock-pi-4c.dts | 2 +- > 3 files changed, 3 insertions(+), 3 deletions(-) > > diff --git a/arch/arm64/boot/dts/rockchip/rk3399-rock-pi-4a.dts > b/arch/arm64/boot/dts/rockchip/rk3399-rock-pi-4a.dts > index d5df8939a..30e63e62a 100644 > --- a/arch/arm64/boot/dts/rockchip/rk3399-rock-pi-4a.dts > +++ b/arch/arm64/boot/dts/rockchip/rk3399-rock-pi-4a.dts > @@ -19,6 +19,6 @@ &spi1 { > flash@0 { > compatible = "jedec,spi-nor"; > reg = <0>; > - spi-max-frequency = <10000000>; > + spi-max-frequency = <50000000>; > }; > }; > diff --git a/arch/arm64/boot/dts/rockchip/rk3399-rock-pi-4b.dts > b/arch/arm64/boot/dts/rockchip/rk3399-rock-pi-4b.dts > index bee6d7588..7122bf6c0 100644 > --- a/arch/arm64/boot/dts/rockchip/rk3399-rock-pi-4b.dts > +++ b/arch/arm64/boot/dts/rockchip/rk3399-rock-pi-4b.dts > @@ -37,7 +37,7 @@ &spi1 { > flash@0 { > compatible = "jedec,spi-nor"; > reg = <0>; > - spi-max-frequency = <10000000>; > + spi-max-frequency = <50000000>; > }; > }; > > diff --git a/arch/arm64/boot/dts/rockchip/rk3399-rock-pi-4c.dts > b/arch/arm64/boot/dts/rockchip/rk3399-rock-pi-4c.dts > index de2ebe4cb..8af75bc7c 100644 > --- a/arch/arm64/boot/dts/rockchip/rk3399-rock-pi-4c.dts > +++ b/arch/arm64/boot/dts/rockchip/rk3399-rock-pi-4c.dts > @@ -49,7 +49,7 @@ &spi1 { > flash@0 { > compatible = "jedec,spi-nor"; > reg = <0>; > - spi-max-frequency = <10000000>; > + spi-max-frequency = <50000000>; > }; > }; It would be better to upstream these changes to the Linux kernel first, and then sync them back to U-Boot.
On 2023-12-15 19:15, Dragan Simic wrote: > On 2023-12-15 13:28, Stefan Nagy wrote: >> The ROCK Pi 4A/B/C boards come with a 32 Mbit SPI NOR flash chip (XTX >> Technology Limited XT25F32) which has a maximum clock frequency of 108 >> MHz. However, the Rockchip SPI controller driver limits the maximum >> SPI clock frequency to 50 MHz. Use this limit for spi-max-freq. >> >> This patch has been tested on ROCK Pi 4A. >> >> Signed-off-by: Stefan Nagy <stefan.nagy@ixypsilon.net> >> --- >> arch/arm64/boot/dts/rockchip/rk3399-rock-pi-4a.dts | 2 +- >> arch/arm64/boot/dts/rockchip/rk3399-rock-pi-4b.dts | 2 +- >> arch/arm64/boot/dts/rockchip/rk3399-rock-pi-4c.dts | 2 +- >> 3 files changed, 3 insertions(+), 3 deletions(-) >> >> diff --git a/arch/arm64/boot/dts/rockchip/rk3399-rock-pi-4a.dts >> b/arch/arm64/boot/dts/rockchip/rk3399-rock-pi-4a.dts >> index d5df8939a..30e63e62a 100644 >> --- a/arch/arm64/boot/dts/rockchip/rk3399-rock-pi-4a.dts >> +++ b/arch/arm64/boot/dts/rockchip/rk3399-rock-pi-4a.dts >> @@ -19,6 +19,6 @@ &spi1 { >> flash@0 { >> compatible = "jedec,spi-nor"; >> reg = <0>; >> - spi-max-frequency = <10000000>; >> + spi-max-frequency = <50000000>; >> }; >> }; >> diff --git a/arch/arm64/boot/dts/rockchip/rk3399-rock-pi-4b.dts >> b/arch/arm64/boot/dts/rockchip/rk3399-rock-pi-4b.dts >> index bee6d7588..7122bf6c0 100644 >> --- a/arch/arm64/boot/dts/rockchip/rk3399-rock-pi-4b.dts >> +++ b/arch/arm64/boot/dts/rockchip/rk3399-rock-pi-4b.dts >> @@ -37,7 +37,7 @@ &spi1 { >> flash@0 { >> compatible = "jedec,spi-nor"; >> reg = <0>; >> - spi-max-frequency = <10000000>; >> + spi-max-frequency = <50000000>; >> }; >> }; >> >> diff --git a/arch/arm64/boot/dts/rockchip/rk3399-rock-pi-4c.dts >> b/arch/arm64/boot/dts/rockchip/rk3399-rock-pi-4c.dts >> index de2ebe4cb..8af75bc7c 100644 >> --- a/arch/arm64/boot/dts/rockchip/rk3399-rock-pi-4c.dts >> +++ b/arch/arm64/boot/dts/rockchip/rk3399-rock-pi-4c.dts >> @@ -49,7 +49,7 @@ &spi1 { >> flash@0 { >> compatible = "jedec,spi-nor"; >> reg = <0>; >> - spi-max-frequency = <10000000>; >> + spi-max-frequency = <50000000>; >> }; >> }; > > It would be better to upstream these changes to the Linux kernel > first, and then sync them back to U-Boot. Oops, my bad, sorry, I got confused with your other patch on the U-Boot mailing list. Regarding the new spi-max-frequency value, it should be better to have it set to what the SPI chip actually supports, and let the SPI driver do its thing.
Am Freitag, dem 15.12.2023 um 19:20 +0100 schrieb Dragan Simic: > On 2023-12-15 19:15, Dragan Simic wrote: > > On 2023-12-15 13:28, Stefan Nagy wrote: > > > The ROCK Pi 4A/B/C boards come with a 32 Mbit SPI NOR flash chip > > > (XTX Technology Limited XT25F32) which has a maximum clock > > > frequency of 108 MHz. However, the Rockchip SPI controller driver > > > limits the maximum SPI clock frequency to 50 MHz. Use this limit > > > for spi-max-freq. > > > > > > This patch has been tested on ROCK Pi 4A. > > > > > > Signed-off-by: Stefan Nagy <stefan.nagy@ixypsilon.net> > > > --- > > > arch/arm64/boot/dts/rockchip/rk3399-rock-pi-4a.dts | 2 +- > > > arch/arm64/boot/dts/rockchip/rk3399-rock-pi-4b.dts | 2 +- > > > arch/arm64/boot/dts/rockchip/rk3399-rock-pi-4c.dts | 2 +- > > > 3 files changed, 3 insertions(+), 3 deletions(-) > > > > > > diff --git a/arch/arm64/boot/dts/rockchip/rk3399-rock-pi-4a.dts > > > b/arch/arm64/boot/dts/rockchip/rk3399-rock-pi-4a.dts > > > index d5df8939a..30e63e62a 100644 > > > --- a/arch/arm64/boot/dts/rockchip/rk3399-rock-pi-4a.dts > > > +++ b/arch/arm64/boot/dts/rockchip/rk3399-rock-pi-4a.dts > > > @@ -19,6 +19,6 @@ &spi1 { > > > flash@0 { > > > compatible = "jedec,spi-nor"; > > > reg = <0>; > > > - spi-max-frequency = <10000000>; > > > + spi-max-frequency = <50000000>; > > > }; > > > }; > > > diff --git a/arch/arm64/boot/dts/rockchip/rk3399-rock-pi-4b.dts > > > b/arch/arm64/boot/dts/rockchip/rk3399-rock-pi-4b.dts > > > index bee6d7588..7122bf6c0 100644 > > > --- a/arch/arm64/boot/dts/rockchip/rk3399-rock-pi-4b.dts > > > +++ b/arch/arm64/boot/dts/rockchip/rk3399-rock-pi-4b.dts > > > @@ -37,7 +37,7 @@ &spi1 { > > > flash@0 { > > > compatible = "jedec,spi-nor"; > > > reg = <0>; > > > - spi-max-frequency = <10000000>; > > > + spi-max-frequency = <50000000>; > > > }; > > > }; > > > > > > diff --git a/arch/arm64/boot/dts/rockchip/rk3399-rock-pi-4c.dts > > > b/arch/arm64/boot/dts/rockchip/rk3399-rock-pi-4c.dts > > > index de2ebe4cb..8af75bc7c 100644 > > > --- a/arch/arm64/boot/dts/rockchip/rk3399-rock-pi-4c.dts > > > +++ b/arch/arm64/boot/dts/rockchip/rk3399-rock-pi-4c.dts > > > @@ -49,7 +49,7 @@ &spi1 { > > > flash@0 { > > > compatible = "jedec,spi-nor"; > > > reg = <0>; > > > - spi-max-frequency = <10000000>; > > > + spi-max-frequency = <50000000>; > > > }; > > > }; > > > > It would be better to upstream these changes to the Linux kernel > > first, and then sync them back to U-Boot. > > Oops, my bad, sorry, I got confused with your other patch on the U- > Boot mailing list. > > Regarding the new spi-max-frequency value, it should be better to > have it set to what the SPI chip actually supports, and let the SPI > driver do its thing. OK, I agree. I'll send a v2 of this patch with a new spi-max-frequency of 108 MHz.
diff --git a/arch/arm64/boot/dts/rockchip/rk3399-rock-pi-4a.dts b/arch/arm64/boot/dts/rockchip/rk3399-rock-pi-4a.dts index d5df8939a..30e63e62a 100644 --- a/arch/arm64/boot/dts/rockchip/rk3399-rock-pi-4a.dts +++ b/arch/arm64/boot/dts/rockchip/rk3399-rock-pi-4a.dts @@ -19,6 +19,6 @@ &spi1 { flash@0 { compatible = "jedec,spi-nor"; reg = <0>; - spi-max-frequency = <10000000>; + spi-max-frequency = <50000000>; }; }; diff --git a/arch/arm64/boot/dts/rockchip/rk3399-rock-pi-4b.dts b/arch/arm64/boot/dts/rockchip/rk3399-rock-pi-4b.dts index bee6d7588..7122bf6c0 100644 --- a/arch/arm64/boot/dts/rockchip/rk3399-rock-pi-4b.dts +++ b/arch/arm64/boot/dts/rockchip/rk3399-rock-pi-4b.dts @@ -37,7 +37,7 @@ &spi1 { flash@0 { compatible = "jedec,spi-nor"; reg = <0>; - spi-max-frequency = <10000000>; + spi-max-frequency = <50000000>; }; }; diff --git a/arch/arm64/boot/dts/rockchip/rk3399-rock-pi-4c.dts b/arch/arm64/boot/dts/rockchip/rk3399-rock-pi-4c.dts index de2ebe4cb..8af75bc7c 100644 --- a/arch/arm64/boot/dts/rockchip/rk3399-rock-pi-4c.dts +++ b/arch/arm64/boot/dts/rockchip/rk3399-rock-pi-4c.dts @@ -49,7 +49,7 @@ &spi1 { flash@0 { compatible = "jedec,spi-nor"; reg = <0>; - spi-max-frequency = <10000000>; + spi-max-frequency = <50000000>; }; };
The ROCK Pi 4A/B/C boards come with a 32 Mbit SPI NOR flash chip (XTX Technology Limited XT25F32) which has a maximum clock frequency of 108 MHz. However, the Rockchip SPI controller driver limits the maximum SPI clock frequency to 50 MHz. Use this limit for spi-max-freq. This patch has been tested on ROCK Pi 4A. Signed-off-by: Stefan Nagy <stefan.nagy@ixypsilon.net> --- arch/arm64/boot/dts/rockchip/rk3399-rock-pi-4a.dts | 2 +- arch/arm64/boot/dts/rockchip/rk3399-rock-pi-4b.dts | 2 +- arch/arm64/boot/dts/rockchip/rk3399-rock-pi-4c.dts | 2 +- 3 files changed, 3 insertions(+), 3 deletions(-)