@@ -860,7 +860,7 @@ static int rk_hdptx_ropll_tmds_mode_config(struct rk_hdptx_phy *hdptx,
static int rk_hdptx_phy_power_on(struct phy *phy)
{
struct rk_hdptx_phy *hdptx = phy_get_drvdata(phy);
- int ret, bus_width = phy_get_bus_width(hdptx->phy);
+ int bus_width = phy_get_bus_width(hdptx->phy);
/*
* FIXME: Temporary workaround to pass pixel_clk_rate
* from the HDMI bridge driver until phy_configure_opts_hdmi
@@ -871,17 +871,7 @@ static int rk_hdptx_phy_power_on(struct phy *phy)
dev_dbg(hdptx->dev, "%s bus_width=%x rate=%u\n",
__func__, bus_width, rate);
- ret = pm_runtime_resume_and_get(hdptx->dev);
- if (ret) {
- dev_err(hdptx->dev, "Failed to resume phy: %d\n", ret);
- return ret;
- }
-
- ret = rk_hdptx_ropll_tmds_mode_config(hdptx, rate);
- if (ret)
- pm_runtime_put(hdptx->dev);
-
- return ret;
+ return rk_hdptx_ropll_tmds_mode_config(hdptx, rate);
}
static int rk_hdptx_phy_power_off(struct phy *phy)
@@ -894,8 +884,6 @@ static int rk_hdptx_phy_power_off(struct phy *phy)
if (ret == 0 && (val & HDPTX_O_PLL_LOCK_DONE))
rk_hdptx_phy_disable(hdptx);
- pm_runtime_put(hdptx->dev);
-
return ret;
}
@@ -977,6 +965,10 @@ static int rk_hdptx_phy_probe(struct platform_device *pdev)
return dev_err_probe(dev, PTR_ERR(hdptx->grf),
"Could not get GRF syscon\n");
+ ret = devm_pm_runtime_enable(dev);
+ if (ret)
+ return dev_err_probe(dev, ret, "Failed to enable runtime PM\n");
+
hdptx->phy = devm_phy_create(dev, NULL, &rk_hdptx_phy_ops);
if (IS_ERR(hdptx->phy))
return dev_err_probe(dev, PTR_ERR(hdptx->phy),
@@ -986,10 +978,6 @@ static int rk_hdptx_phy_probe(struct platform_device *pdev)
phy_set_drvdata(hdptx->phy, hdptx);
phy_set_bus_width(hdptx->phy, 8);
- ret = devm_pm_runtime_enable(dev);
- if (ret)
- return dev_err_probe(dev, ret, "Failed to enable runtime PM\n");
-
phy_provider = devm_of_phy_provider_register(dev, of_phy_simple_xlate);
if (IS_ERR(phy_provider))
return dev_err_probe(dev, PTR_ERR(phy_provider),