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AJvYcCXADo7L49I+CgwU9xwMwi0Z9YDlWUF7Y2Oe/OiswV1Lm4gCDzWvr/wxsV7q+hevgW1eIqiGeT5fQAesyZqkxQMMIclrhfkcI8Pto4m0YUV9x6QvTO4NcsYQKnb/e6LTIeTsWfYSKKCk3OLCS2si3Zu0Nt4LH3mcNm4= X-Gm-Message-State: AOJu0YxZv4O31lfeZR51exUaV6c7SvragfE/dbbxlI77Q54lD804FMhf UEwctmsMTwHqLTQZjPUdiXhP5qEPVlMK9TXID8F5ARcGkJNOZneq X-Google-Smtp-Source: AGHT+IHuJ1mXFaao+RTtKGJI076Uc/J+w7qZ8G+7L6MJuDnrylCAZ8V6ZvnmJwYgJRvBofjiysqXFw== X-Received: by 2002:a2e:b887:0:b0:2ef:2eb9:5e55 with SMTP id 38308e7fff4ca-2f19de332e6mr13382161fa.13.1723120528722; Thu, 08 Aug 2024 05:35:28 -0700 (PDT) Received: from yoga-710.tas.nnz-ipc.net ([178.218.200.115]) by smtp.gmail.com with ESMTPSA id 38308e7fff4ca-2f15e17e835sm21072261fa.21.2024.08.08.05.35.27 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 08 Aug 2024 05:35:28 -0700 (PDT) From: Dmitry Yashin To: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Heiko Stuebner Cc: devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org, Dmitry Yashin Subject: [PATCH 1/2] arm64: dts: rockchip: add USB-C port 0 to OK3588-C Date: Thu, 8 Aug 2024 17:33:53 +0500 Message-ID: <20240808123354.260797-2-dmt.yashin@gmail.com> X-Mailer: git-send-email 2.46.0 In-Reply-To: <20240808123354.260797-1-dmt.yashin@gmail.com> References: <20240808123354.260797-1-dmt.yashin@gmail.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240808_053532_277709_C5E8A3B8 X-CRM114-Status: GOOD ( 11.80 ) X-BeenThere: linux-rockchip@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: Upstream kernel work for Rockchip platforms List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "Linux-rockchip" Errors-To: linux-rockchip-bounces+linux-rockchip=archiver.kernel.org@lists.infradead.org Add support for TypeC0 found on Forlinx OK3588-C. Powering the board using this port is not supported, so set power-role to source. Signed-off-by: Dmitry Yashin --- .../boot/dts/rockchip/rk3588-ok3588-c.dts | 110 ++++++++++++++++++ 1 file changed, 110 insertions(+) diff --git a/arch/arm64/boot/dts/rockchip/rk3588-ok3588-c.dts b/arch/arm64/boot/dts/rockchip/rk3588-ok3588-c.dts index c2a08bdf09e8..1b6bfa2b1a69 100644 --- a/arch/arm64/boot/dts/rockchip/rk3588-ok3588-c.dts +++ b/arch/arm64/boot/dts/rockchip/rk3588-ok3588-c.dts @@ -1,6 +1,7 @@ // SPDX-License-Identifier: (GPL-2.0+ OR MIT) /dts-v1/; +#include #include "rk3588-fet3588-c.dtsi" / { @@ -100,6 +101,18 @@ masterdai: simple-audio-card,codec { }; }; + vbus5v0_typec0: vbus5v0-typec0-regulator { + compatible = "regulator-fixed"; + regulator-name = "vbus5v0_typec0"; + enable-active-high; + gpio = <&gpio0 RK_PD0 GPIO_ACTIVE_HIGH>; + pinctrl-names = "default"; + pinctrl-0 = <&typec5v_0_pwren>; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + vin-supply = <&vcc5v0_sys>; + }; + vcc12v_dcin: vcc12v-dcin-regulator { compatible = "regulator-fixed"; regulator-name = "vcc12v_dcin"; @@ -206,6 +219,51 @@ &gpu { &i2c2 { status = "okay"; + usbc0: usb-typec@22 { + compatible = "fcs,fusb302"; + reg = <0x22>; + interrupt-parent = <&gpio1>; + interrupts = ; + pinctrl-names = "default"; + pinctrl-0 = <&usbc0_int>; + vbus-supply = <&vbus5v0_typec0>; + + usb_con0: connector { + compatible = "usb-c-connector"; + label = "USB-C"; + data-role = "dual"; + power-role = "source"; + source-pdos = + ; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + usbc0_hs: endpoint { + remote-endpoint = <&usb_host0_xhci_drd_sw>; + }; + }; + + port@1 { + reg = <1>; + usbc0_ss: endpoint { + remote-endpoint = <&usbdp_phy0_typec_ss>; + }; + }; + + port@2 { + reg = <2>; + usbc0_sbu: endpoint { + remote-endpoint = <&usbdp_phy0_typec_sbu>; + }; + }; + }; + }; + }; + tca6424a: gpio@23 { compatible = "ti,tca6424"; reg = <0x23>; @@ -349,6 +407,16 @@ tca6424a_int: tca6424a-int { rockchip,pins = <1 RK_PA4 RK_FUNC_GPIO &pcfg_pull_up>; }; }; + + usb-typec { + typec5v_0_pwren: typec5v-0-pwren { + rockchip,pins = <0 RK_PD0 RK_FUNC_GPIO &pcfg_pull_none>; + }; + + usbc0_int: usbc0-int { + rockchip,pins = <1 RK_PB0 RK_FUNC_GPIO &pcfg_pull_up>; + }; + }; }; &pwm2 { @@ -378,6 +446,14 @@ &tsadc { status = "okay"; }; +&u2phy0 { + status = "okay"; +}; + +&u2phy0_otg { + status = "okay"; +}; + &u2phy2 { status = "okay"; }; @@ -394,6 +470,29 @@ &u2phy3_host { status = "okay"; }; +&usbdp_phy0 { + mode-switch; + orientation-switch; + sbu1-dc-gpios = <&gpio4 RK_PA0 GPIO_ACTIVE_HIGH>; + sbu2-dc-gpios = <&gpio4 RK_PB0 GPIO_ACTIVE_HIGH>; + status = "okay"; + + port { + #address-cells = <1>; + #size-cells = <0>; + + usbdp_phy0_typec_ss: endpoint@0 { + reg = <0>; + remote-endpoint = <&usbc0_ss>; + }; + + usbdp_phy0_typec_sbu: endpoint@1 { + reg = <1>; + remote-endpoint = <&usbc0_sbu>; + }; + }; +}; + &usb_host0_ehci { status = "okay"; }; @@ -402,6 +501,17 @@ &usb_host0_ohci { status = "okay"; }; +&usb_host0_xhci { + usb-role-switch; + status = "okay"; + + port { + usb_host0_xhci_drd_sw: endpoint { + remote-endpoint = <&usbc0_hs>; + }; + }; +}; + &usb_host1_ehci { status = "okay"; };