diff mbox series

[v3,07/12] gpio: rockchip: support 'clock-names' from dt nodes

Message ID 20240903073649.237362-8-ye.zhang@rock-chips.com (mailing list archive)
State New
Headers show
Series gpio: rockchip: Update the GPIO driver | expand

Commit Message

Ye Zhang Sept. 3, 2024, 7:36 a.m. UTC 
Added support for retrieving clocks using 'clock-names' from dt nodes

Signed-off-by: Ye Zhang <ye.zhang@rock-chips.com>
---
 drivers/gpio/gpio-rockchip.c       | 54 +++++++++++++++++++++---------
 drivers/pinctrl/pinctrl-rockchip.h |  2 ++
 2 files changed, 40 insertions(+), 16 deletions(-)

Comments

Andy Shevchenko Sept. 3, 2024, 3:59 p.m. UTC | #1 
On Tue, Sep 03, 2024 at 03:36:44PM +0800, Ye Zhang wrote:
> Added support for retrieving clocks using 'clock-names' from dt nodes

...

> +	bank->clk = devm_clk_get_enabled(dev, "bus");

I would use _optional() variant.

> +	if (IS_ERR(bank->clk)) {
> +		bank->clk = of_clk_get(dev->of_node, 0);
> +		if (IS_ERR(bank->clk)) {
> +			dev_err(dev, "fail to get apb clock\n");
> +			return PTR_ERR(bank->clk);
> +		}

> +		clk_prepare_enable(bank->clk);

Why? How was it tested?

> +		bank->manual_clk_release = true;
> +	}

It seems you need to unnest the conditionals and think through the logic.

> +	bank->db_clk = devm_clk_get_enabled(dev, "db");
> +	if (IS_ERR(bank->db_clk)) {
> +		bank->db_clk = of_clk_get(dev->of_node, 1);
> +		if (IS_ERR(bank->db_clk)) {
> +			bank->db_clk = NULL;
> +		} else {
> +			clk_prepare_enable(bank->db_clk);

Ditto.

> +			bank->manual_dbclk_release = true;
> +		}
> +	}

...

>  	ret = rockchip_get_bank_data(bank);
>  	if (ret)
> -		return ret;
> +		goto err_disabled_clk;

No, just make sure it's properly wrapped by devm.

...

> +	bool				manual_clk_release;
> +	bool				manual_dbclk_release;

Why do you need them?
diff mbox series

Patch

diff --git a/drivers/gpio/gpio-rockchip.c b/drivers/gpio/gpio-rockchip.c
index 2e80f28bb0c4..83df1632112d 100644
--- a/drivers/gpio/gpio-rockchip.c
+++ b/drivers/gpio/gpio-rockchip.c
@@ -650,23 +650,12 @@  static int rockchip_get_bank_data(struct rockchip_pin_bank *bank)
 	if (!bank->irq)
 		return -EINVAL;
 
-	bank->clk = of_clk_get(bank->of_node, 0);
-	if (IS_ERR(bank->clk))
-		return PTR_ERR(bank->clk);
-
-	clk_prepare_enable(bank->clk);
 	id = readl(bank->reg_base + gpio_regs_v2.version_id);
 
 	/* If not gpio v2, that is default to v1. */
 	if (id == GPIO_TYPE_V2 || id == GPIO_TYPE_V2_1) {
 		bank->gpio_regs = &gpio_regs_v2;
 		bank->gpio_type = GPIO_TYPE_V2;
-		bank->db_clk = of_clk_get(bank->of_node, 1);
-		if (IS_ERR(bank->db_clk)) {
-			dev_err(bank->dev, "cannot find debounce clk\n");
-			clk_disable_unprepare(bank->clk);
-			return -EINVAL;
-		}
 	} else {
 		bank->gpio_regs = &gpio_regs_v1;
 		bank->gpio_type = GPIO_TYPE_V1;
@@ -726,9 +715,31 @@  static int rockchip_gpio_probe(struct platform_device *pdev)
 
 	raw_spin_lock_init(&bank->slock);
 
+	bank->clk = devm_clk_get_enabled(dev, "bus");
+	if (IS_ERR(bank->clk)) {
+		bank->clk = of_clk_get(dev->of_node, 0);
+		if (IS_ERR(bank->clk)) {
+			dev_err(dev, "fail to get apb clock\n");
+			return PTR_ERR(bank->clk);
+		}
+		clk_prepare_enable(bank->clk);
+		bank->manual_clk_release = true;
+	}
+
+	bank->db_clk = devm_clk_get_enabled(dev, "db");
+	if (IS_ERR(bank->db_clk)) {
+		bank->db_clk = of_clk_get(dev->of_node, 1);
+		if (IS_ERR(bank->db_clk)) {
+			bank->db_clk = NULL;
+		} else {
+			clk_prepare_enable(bank->db_clk);
+			bank->manual_dbclk_release = true;
+		}
+	}
+
 	ret = rockchip_get_bank_data(bank);
 	if (ret)
-		return ret;
+		goto err_disabled_clk;
 
 	/*
 	 * Prevent clashes with a deferred output setting
@@ -738,9 +749,8 @@  static int rockchip_gpio_probe(struct platform_device *pdev)
 
 	ret = rockchip_gpiolib_register(bank);
 	if (ret) {
-		clk_disable_unprepare(bank->clk);
-		mutex_unlock(&bank->deferred_lock);
-		return ret;
+		dev_err(bank->dev, "Failed to register gpio %d\n", ret);
+		goto err_unlock;
 	}
 
 	while (!list_empty(&bank->deferred_pins)) {
@@ -773,13 +783,25 @@  static int rockchip_gpio_probe(struct platform_device *pdev)
 	dev_info(dev, "probed %pOF\n", np);
 
 	return 0;
+err_unlock:
+	mutex_unlock(&bank->deferred_lock);
+err_disabled_clk:
+	if (bank->manual_clk_release)
+		clk_disable_unprepare(bank->clk);
+	if (bank->manual_dbclk_release)
+		clk_disable_unprepare(bank->db_clk);
+
+	return ret;
 }
 
 static void rockchip_gpio_remove(struct platform_device *pdev)
 {
 	struct rockchip_pin_bank *bank = platform_get_drvdata(pdev);
 
-	clk_disable_unprepare(bank->clk);
+	if (bank->manual_clk_release)
+		clk_disable_unprepare(bank->clk);
+	if (bank->manual_dbclk_release)
+		clk_disable_unprepare(bank->db_clk);
 	gpiochip_remove(&bank->gpio_chip);
 }
 
diff --git a/drivers/pinctrl/pinctrl-rockchip.h b/drivers/pinctrl/pinctrl-rockchip.h
index 0b2b56014b17..bb6df7296508 100644
--- a/drivers/pinctrl/pinctrl-rockchip.h
+++ b/drivers/pinctrl/pinctrl-rockchip.h
@@ -319,6 +319,8 @@  struct rockchip_pin_bank {
 	struct regmap			*regmap_pull;
 	struct clk			*clk;
 	struct clk			*db_clk;
+	bool				manual_clk_release;
+	bool				manual_dbclk_release;
 	int				irq;
 	u32				saved_masks;
 	u32				pin_base;