From patchwork Fri Oct 11 12:13:58 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Damien Le Moal X-Patchwork-Id: 13832502 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 3F844D0D786 for ; Fri, 11 Oct 2024 12:25:09 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-ID:Date:Subject:Cc:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=rEUYfiO0uN/qljlWXESYKA5PTiNa5IxCeWg0MBWt4II=; b=SR2YhoOOz/YTnP Ku9w5p4C5n2E/Xta7/oYtp/RKNTSWw53+lz22IyLdGrnEHwryCGvCvKSXU6F8GlPadrkdJJ6u517t JXpj6Y685WeMh2SJGQm6DdSx9mPoim7oMZBKM8XW2o6rdIwedmwnA0sGpXRadcc2uTldU++2hc7O+ GcT3a0sZIYTHCm+0xvuB/ocXskrQs+pWLCVNaDnZuqUIm8820/ZrBYlNCwJ/M7PHKi3SurZve6stT /AAin1VGD28DXN+SFmY4Y2pmJKNGUUoqAwsX5SRJI7AX92XZUo8zqepBhUr/wRboRDJq34ucUEBq1 5ExQcnBbSctXCtTzzUbw==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.98 #2 (Red Hat Linux)) id 1szEhc-0000000GHs4-45RX; Fri, 11 Oct 2024 12:25:04 +0000 Received: from nyc.source.kernel.org ([2604:1380:45d1:ec00::3]) by bombadil.infradead.org with esmtps (Exim 4.98 #2 (Red Hat Linux)) id 1szEXB-0000000GFmq-1IRy for linux-rockchip@lists.infradead.org; Fri, 11 Oct 2024 12:14:18 +0000 Received: from smtp.kernel.org (transwarp.subspace.kernel.org [100.75.92.58]) by nyc.source.kernel.org (Postfix) with ESMTP id B6D8EA436AF; Fri, 11 Oct 2024 12:14:07 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 231ADC4CED1; Fri, 11 Oct 2024 12:14:14 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1728648856; bh=zQqRrc/dvgOEU1I54D/JpkTrW4JiU5wFmnUl/V52Wko=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=q+OfFH4sv0rCu/sTV0MyrtVr/CRTlDpYdRJ7ENI5HlTrl1W7l75ZStre3YEczDkI9 Q13jbLghGcVWP5kuu4P9Qtg/+cLdYthA6Ufh9YIXxe9SMtPkiWgTLAEM33GHHM7vOP QuzQy5McInOTE96wKH90Ocp/v+O2fz2A+ALsqApRnptA37rlhfpvDKgYA+RcUgs4Ob mn7WiUOc7k6DoxpK/5CW9so6oFAhTiS9B9ozCkP5gi//IXzuX1PzeEcUBszKKIGBAj 9cm3jPrS6NGuoM5KsDSTdvJ6I5h69d4Te9e8EBXY2KN/7FpYg8lOuYoNZF4VgPo/JP Po8PVIgI2Pqbg== From: Damien Le Moal To: Manivannan Sadhasivam , Lorenzo Pieralisi , Kishon Vijay Abraham I , Shawn Lin , =?utf-8?q?Krzysztof_Wilczy=C5=84ski?= , Bjorn Helgaas , Heiko Stuebner , linux-pci@vger.kernel.org, Rob Herring , Krzysztof Kozlowski , Conor Dooley , devicetree@vger.kernel.org Cc: linux-rockchip@lists.infradead.org, Rick Wertenbroek , Niklas Cassel Subject: [PATCH v4 02/12] PCI: rockchip-ep: Use a macro to define EP controller .align feature Date: Fri, 11 Oct 2024 21:13:58 +0900 Message-ID: <20241011121408.89890-3-dlemoal@kernel.org> X-Mailer: git-send-email 2.46.2 In-Reply-To: <20241011121408.89890-1-dlemoal@kernel.org> References: <20241011121408.89890-1-dlemoal@kernel.org> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20241011_051417_435885_F09D382F X-CRM114-Status: GOOD ( 11.63 ) X-BeenThere: linux-rockchip@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: Upstream kernel work for Rockchip platforms List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "Linux-rockchip" Errors-To: linux-rockchip-bounces+linux-rockchip=archiver.kernel.org@lists.infradead.org Introduce the macro ROCKCHIP_PCIE_AT_SIZE_ALIGN to initialize the .align field of the controller epc_features structure to 256. This is defined as a shift using the macro ROCKCHIP_PCIE_AT_MIN_NUM_BITS (to avoid using the "magic" value 8 directly). Signed-off-by: Damien Le Moal Reviewed-by: Manivannan Sadhasivam --- drivers/pci/controller/pcie-rockchip-ep.c | 2 +- drivers/pci/controller/pcie-rockchip.h | 1 + 2 files changed, 2 insertions(+), 1 deletion(-) diff --git a/drivers/pci/controller/pcie-rockchip-ep.c b/drivers/pci/controller/pcie-rockchip-ep.c index 27a7febb74e0..5a07084fb7c4 100644 --- a/drivers/pci/controller/pcie-rockchip-ep.c +++ b/drivers/pci/controller/pcie-rockchip-ep.c @@ -446,7 +446,7 @@ static const struct pci_epc_features rockchip_pcie_epc_features = { .linkup_notifier = false, .msi_capable = true, .msix_capable = false, - .align = 256, + .align = ROCKCHIP_PCIE_AT_SIZE_ALIGN, }; static const struct pci_epc_features* diff --git a/drivers/pci/controller/pcie-rockchip.h b/drivers/pci/controller/pcie-rockchip.h index 15ee949f2485..02368ce9bd54 100644 --- a/drivers/pci/controller/pcie-rockchip.h +++ b/drivers/pci/controller/pcie-rockchip.h @@ -248,6 +248,7 @@ #define ROCKCHIP_PCIE_AT_MIN_NUM_BITS 8 #define ROCKCHIP_PCIE_AT_MAX_NUM_BITS 20 +#define ROCKCHIP_PCIE_AT_SIZE_ALIGN (1UL << ROCKCHIP_PCIE_AT_MIN_NUM_BITS) #define ROCKCHIP_PCIE_AT_IB_EP_FUNC_BAR_ADDR0(fn, bar) \ (PCIE_CORE_AXI_CONF_BASE + 0x0828 + (fn) * 0x0040 + (bar) * 0x0008)