From patchwork Tue Dec 3 16:49:31 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: =?utf-8?q?Heiko_St=C3=BCbner?= X-Patchwork-Id: 13892705 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 14026E74AC4 for ; Tue, 3 Dec 2024 16:51:54 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-ID:Date:Subject:Cc:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=kxHUYcBKuvXr6J8lBeotZUQq6e/B9e+BK4jvi9tu+Bg=; b=DOVRL9CQpd2PsJ uby2WBPW2UGAnCJUgmKDkVU1ff0oHWRC6f+xJtgPyPzjK/uEmhE2xNjMIMNHtXUNzw7/3HWbv9VAK NEPmGN9msDo/IFoDHU072yVB7UptVGJq57OHpbNzDqr9JpzquI861NqrGSCTD1XI5x3Wp9O2mTyPC Wan1m4FLAfsnLcT2mXZsNtj4OkO0YZ73o8uotJGYQZADxFR/y1jOFa+wYi45j6rZ7IrZrhHVvrlnh KdSlN87524b/zr9c2XRTY/T01nudnj7jPQyC2i5GJZqDnM6f/z0wF7cZhxcqN1LS75rtHYqDsDrrR OiHEu8sFyrOSil+vGsHQ==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.98 #2 (Red Hat Linux)) id 1tIW7p-0000000AA7n-3U0x; Tue, 03 Dec 2024 16:51:49 +0000 Received: from gloria.sntech.de ([185.11.138.130]) by bombadil.infradead.org with esmtps (Exim 4.98 #2 (Red Hat Linux)) id 1tIW5r-0000000A9Vt-1OvM; Tue, 03 Dec 2024 16:49:48 +0000 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=sntech.de; s=gloria202408; h=Content-Transfer-Encoding:MIME-Version:References: In-Reply-To:Message-ID:Date:Subject:Cc:To:From:Sender:Reply-To:Content-Type: Content-ID:Content-Description:Resent-Date:Resent-From:Resent-Sender: Resent-To:Resent-Cc:Resent-Message-ID:List-Id:List-Help:List-Unsubscribe: List-Subscribe:List-Post:List-Owner:List-Archive; bh=dDXtirkofJxQHdUKHvGa7WJ/KJTFg04tK9XP7XOZ27M=; b=jTaNCrgBZ+IiFYouTRSOu4rbUl mYagNk3XadpVmDdPny1K2WzbbzERGPcw+xyns8UUQI1Rf9RTGsfToipMIY6e8aFbN07LeTEvOZP4f o+DuMzw7BFBiHDBf8/6oR5EEiZ6lmYJsBgRcM/5+3MS9PZypJOzp+B/nWmEHakjTyeRsKrJPs1U43 Tb8339IgRSBRRgZNWQmkOyYvKo/Oyi0kya7DLWKvMii+Gm8Ckw4tRG0IouGQ9zIdXbxLYXXfqXL+k TyS2Skc3KiNhnx43BQkMRXlPD/E8xAKemDIq3M7azRFznhSSOUw2O4DrpOb7xkboEXSMa7FLxNl1B 98OfhNcw==; Received: from i53875bc4.versanet.de ([83.135.91.196] helo=localhost.localdomain) by gloria.sntech.de with esmtpsa (TLS1.3) tls TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 (Exim 4.94.2) (envelope-from ) id 1tIW5n-0003fy-Rc; Tue, 03 Dec 2024 17:49:43 +0100 From: Heiko Stuebner To: vkoul@kernel.org, kishon@kernel.org Cc: robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, quentin.schulz@cherry.de, sebastian.reichel@collabora.com, heiko@sntech.de, linux-phy@lists.infradead.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org, dse@thaumatec.com, Heiko Stuebner , Conor Dooley Subject: [PATCH v5 1/2] dt-bindings: phy: Add Rockchip MIPI C-/D-PHY schema Date: Tue, 3 Dec 2024 17:49:31 +0100 Message-ID: <20241203164934.1500616-2-heiko@sntech.de> X-Mailer: git-send-email 2.45.2 In-Reply-To: <20241203164934.1500616-1-heiko@sntech.de> References: <20241203164934.1500616-1-heiko@sntech.de> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20241203_084947_371404_4271D506 X-CRM114-Status: GOOD ( 14.13 ) X-BeenThere: linux-rockchip@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: Upstream kernel work for Rockchip platforms List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "Linux-rockchip" Errors-To: linux-rockchip-bounces+linux-rockchip=archiver.kernel.org@lists.infradead.org From: Heiko Stuebner Add dt-binding schema for the MIPI C-/D-PHY found on Rockchip RK3588 SoCs. Tested-by: Daniel Semkowicz Tested-by: Sebastian Reichel Reviewed-by: Sebastian Reichel Acked-by: Conor Dooley Signed-off-by: Heiko Stuebner Reviewed-by: Krzysztof Kozlowski --- .../phy/rockchip,rk3588-mipi-dcphy.yaml | 87 +++++++++++++++++++ 1 file changed, 87 insertions(+) create mode 100644 Documentation/devicetree/bindings/phy/rockchip,rk3588-mipi-dcphy.yaml diff --git a/Documentation/devicetree/bindings/phy/rockchip,rk3588-mipi-dcphy.yaml b/Documentation/devicetree/bindings/phy/rockchip,rk3588-mipi-dcphy.yaml new file mode 100644 index 000000000000..c8ff5ba22a86 --- /dev/null +++ b/Documentation/devicetree/bindings/phy/rockchip,rk3588-mipi-dcphy.yaml @@ -0,0 +1,87 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/phy/rockchip,rk3588-mipi-dcphy.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Rockchip MIPI D-/C-PHY with Samsung IP block + +maintainers: + - Guochun Huang + - Heiko Stuebner + +properties: + compatible: + enum: + - rockchip,rk3576-mipi-dcphy + - rockchip,rk3588-mipi-dcphy + + reg: + maxItems: 1 + + "#phy-cells": + const: 1 + description: | + Argument is mode to operate in. Supported modes are: + - PHY_TYPE_DPHY + - PHY_TYPE_CPHY + See include/dt-bindings/phy/phy.h for constants. + + clocks: + maxItems: 2 + + clock-names: + items: + - const: pclk + - const: ref + + resets: + maxItems: 4 + + reset-names: + items: + - const: m_phy + - const: apb + - const: grf + - const: s_phy + + rockchip,grf: + $ref: /schemas/types.yaml#/definitions/phandle + description: + Phandle to the syscon managing the 'mipi dcphy general register files'. + +required: + - compatible + - reg + - clocks + - clock-names + - resets + - reset-names + - "#phy-cells" + +additionalProperties: false + +examples: + - | + #include + #include + + soc { + #address-cells = <2>; + #size-cells = <2>; + + phy@feda0000 { + compatible = "rockchip,rk3588-mipi-dcphy"; + reg = <0x0 0xfeda0000 0x0 0x10000>; + clocks = <&cru PCLK_MIPI_DCPHY0>, + <&cru CLK_USBDPPHY_MIPIDCPPHY_REF>; + clock-names = "pclk", "ref"; + resets = <&cru SRST_M_MIPI_DCPHY0>, + <&cru SRST_P_MIPI_DCPHY0>, + <&cru SRST_P_MIPI_DCPHY0_GRF>, + <&cru SRST_S_MIPI_DCPHY0>; + reset-names = "m_phy", "apb", "grf", "s_phy"; + rockchip,grf = <&mipidcphy0_grf>; + #phy-cells = <1>; + }; + };