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([103.217.239.66]) by smtp.gmail.com with ESMTPSA id d2e1a72fcca58-72aad8dbb5asm14510517b3a.93.2024.12.27.05.29.42 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 27 Dec 2024 05:29:45 -0800 (PST) From: Jagan Teki To: Heiko Stuebner , linux-rockchip@lists.infradead.org Subject: [PATCH V2] arm64: dts: rockchip: Enable HDMI1 out for Edgeble-6TOPS Modules Date: Fri, 27 Dec 2024 18:59:36 +0530 Message-Id: <20241227132936.168100-1-jagan@edgeble.ai> X-Mailer: git-send-email 2.34.1 MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20241227_052947_445697_6DB2DBC6 X-CRM114-Status: UNSURE ( 9.59 ) X-CRM114-Notice: Please train this message. X-BeenThere: linux-rockchip@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: Upstream kernel work for Rockchip platforms List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Rob Herring , Conor Dooley , devicetree@vger.kernel.org, Jagan Teki , Krzysztof Kozlowski , linux-arm-kernel@lists.infradead.org Sender: "Linux-rockchip" Errors-To: linux-rockchip-bounces+linux-rockchip=archiver.kernel.org@lists.infradead.org Edgeble-6TOPS modules configure HDMI1 for HDMI Out from RK3588. Enable it on Edgeble-6TOPS IO Board dtsi. Cc: Cristian Ciocaltea Signed-off-by: Jagan Teki --- Changes for v2: - Rebase on top of Cristian's series https://patchwork.kernel.org/project/linux-rockchip/cover/20241211-rk3588-hdmi1-v2-0-02cdca22ff68@collabora.com/ - Update hdptxphy1 .../dts/rockchip/rk3588-edgeble-neu6a-io.dtsi | 47 +++++++++++++++++++ 1 file changed, 47 insertions(+) diff --git a/arch/arm64/boot/dts/rockchip/rk3588-edgeble-neu6a-io.dtsi b/arch/arm64/boot/dts/rockchip/rk3588-edgeble-neu6a-io.dtsi index 7125790bbed2..08920344a4b8 100644 --- a/arch/arm64/boot/dts/rockchip/rk3588-edgeble-neu6a-io.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk3588-edgeble-neu6a-io.dtsi @@ -4,12 +4,24 @@ */ #include +#include / { chosen { stdout-path = "serial2:1500000n8"; }; + hdmi1-con { + compatible = "hdmi-connector"; + type = "a"; + + port { + hdmi1_con_in: endpoint { + remote-endpoint = <&hdmi1_out_con>; + }; + }; + }; + /* Unnamed gated oscillator: 100MHz,3.3V,3225 */ pcie30_port0_refclk: pcie30_port1_refclk: pcie-oscillator { compatible = "gated-fixed-clock"; @@ -81,6 +93,26 @@ &combphy2_psu { status = "okay"; }; +&hdmi1 { + status = "okay"; +}; + +&hdmi1_in { + hdmi1_in_vp0: endpoint { + remote-endpoint = <&vp0_out_hdmi1>; + }; +}; + +&hdmi1_out { + hdmi1_out_con: endpoint { + remote-endpoint = <&hdmi1_con_in>; + }; +}; + +&hdptxphy1 { + status = "okay"; +}; + &i2c6 { status = "okay"; @@ -275,3 +307,18 @@ &usb_host1_ohci { &usb_host2_xhci { status = "okay"; }; + +&vop_mmu { + status = "okay"; +}; + +&vop { + status = "okay"; +}; + +&vp0 { + vp0_out_hdmi1: endpoint@ROCKCHIP_VOP2_EP_HDMI1 { + reg = ; + remote-endpoint = <&hdmi1_in_vp0>; + }; +};