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Tue, 14 Jan 2025 17:26:47 -0800 (PST) From: Peter Geis To: Heiko Stuebner Cc: zyw@rock-chips.com, kever.yang@rock-chips.com, frank.wang@rock-chips.com, william.wu@rock-chips.com, wulf@rock-chips.com, linux-rockchip@lists.infradead.org, Peter Geis , Alex Bee , Conor Dooley , Diederik de Haas , Dragan Simic , Johan Jonker , Jonas Karlman , Krzysztof Kozlowski , Rob Herring , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Subject: [RFC PATCH v1 4/6] arm64: dts: rockchip: add rk3328 usb3 phy node Date: Wed, 15 Jan 2025 01:26:25 +0000 Message-Id: <20250115012628.1035928-5-pgwipeout@gmail.com> X-Mailer: git-send-email 2.39.5 In-Reply-To: <20250115012628.1035928-1-pgwipeout@gmail.com> References: <20250115012628.1035928-1-pgwipeout@gmail.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20250114_172649_691018_D2BAE516 X-CRM114-Status: GOOD ( 10.56 ) X-BeenThere: linux-rockchip@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: Upstream kernel work for Rockchip platforms List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "Linux-rockchip" Errors-To: linux-rockchip-bounces+linux-rockchip=archiver.kernel.org@lists.infradead.org Add the node for the rk3328 usb3 phy. This node provides a combined usb2 and usb3 phy which are permenantly tied to the dwc3 usb3 controller. Signed-off-by: Peter Geis --- arch/arm64/boot/dts/rockchip/rk3328.dtsi | 39 ++++++++++++++++++++++++ 1 file changed, 39 insertions(+) diff --git a/arch/arm64/boot/dts/rockchip/rk3328.dtsi b/arch/arm64/boot/dts/rockchip/rk3328.dtsi index 7d992c3c01ce..181a900d41f9 100644 --- a/arch/arm64/boot/dts/rockchip/rk3328.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk3328.dtsi @@ -903,6 +903,43 @@ u2phy_host: host-port { }; }; + usb3phy: usb3-phy@ff460000 { + compatible = "rockchip,rk3328-usb3phy"; + reg = <0x0 0xff460000 0x0 0x10000>; + clocks = <&cru SCLK_REF_USB3OTG>, <&cru PCLK_USB3PHY_OTG>, <&cru PCLK_USB3PHY_PIPE>; + clock-names = "refclk-usb3otg", "usb3phy-otg", "usb3phy-pipe"; + interrupts = , , + , ; + interrupt-names = "bvalid", "id", "linestate", "rxdet"; + resets = <&cru SRST_USB3PHY_U2>, + <&cru SRST_USB3PHY_U3>, + <&cru SRST_USB3PHY_PIPE>, + <&cru SRST_USB3OTG_UTMI>, + <&cru SRST_USB3PHY_OTG_P>, + <&cru SRST_USB3PHY_PIPE_P>; + reset-names = "usb3phy-u2-por", "usb3phy-u3-por", + "usb3phy-pipe-mac", "usb3phy-utmi-mac", + "usb3phy-utmi-apb", "usb3phy-pipe-apb"; + #address-cells = <2>; + #size-cells = <2>; + ranges; + status = "disabled"; + + usb3phy_utmi: utmi-port@ff470000 { + compatible = "rockchip,rk3328-usb3phy-utmi"; + reg = <0x0 0xff470000 0x0 0x8000>; + #phy-cells = <0>; + status = "disabled"; + }; + + usb3phy_pipe: pipe-port@ff478000 { + compatible = "rockchip,rk3328-usb3phy-pipe"; + reg = <0x0 0xff478000 0x0 0x8000>; + #phy-cells = <0>; + status = "disabled"; + }; + }; + sdmmc: mmc@ff500000 { compatible = "rockchip,rk3328-dw-mshc", "rockchip,rk3288-dw-mshc"; reg = <0x0 0xff500000 0x0 0x4000>; @@ -1067,6 +1104,8 @@ usbdrd3: usb@ff600000 { clock-names = "ref_clk", "suspend_clk", "bus_clk"; dr_mode = "otg"; + phys = <&usb3phy_utmi>, <&usb3phy_pipe>; + phy-names = "usb2-phy", "usb3-phy"; phy_type = "utmi_wide"; snps,dis-del-phy-power-chg-quirk; snps,dis_enblslpm_quirk;