Message ID | 20250206064552.11466-1-andyshrk@163.com (mailing list archive) |
---|---|
State | New |
Headers | show |
Series | VOP Support for rk3576 | expand |
On Thu, Feb 06, 2025 at 02:45:48PM +0800, Andy Yan wrote: > From: Andy Yan <andy.yan@rock-chips.com> > > The clock polarity of RGB signal output is controlled by GRF, this > property is already being used in the current device tree, but > forgot to describe it as a required property in the binding file. > > Signed-off-by: Andy Yan <andy.yan@rock-chips.com> > > --- Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Best regards, Krzysztof
diff --git a/Documentation/devicetree/bindings/display/rockchip/rockchip-vop2.yaml b/Documentation/devicetree/bindings/display/rockchip/rockchip-vop2.yaml index 32da1625c063..cf68eb911118 100644 --- a/Documentation/devicetree/bindings/display/rockchip/rockchip-vop2.yaml +++ b/Documentation/devicetree/bindings/display/rockchip/rockchip-vop2.yaml @@ -142,6 +142,9 @@ allOf: rockchip,vop-grf: false rockchip,pmu: false + required: + - rockchip,grf + - if: properties: compatible: @@ -196,6 +199,7 @@ examples: "dclk_vp1", "dclk_vp2"; power-domains = <&power RK3568_PD_VO>; + rockchip,grf = <&grf>; iommus = <&vop_mmu>; vop_out: ports { #address-cells = <1>;