@@ -40,6 +40,21 @@ properties:
- const: tsadc
- const: apb_pclk
+ nvmem-cells:
+ items:
+ - description: cell handle of the low byte of the chip fallback trim value
+ - description: cell handle of the high byte of the chip fallback trim value
+ - description: cell handle to where the trim's base temperature is stored
+ - description:
+ cell handle to where the trim's tenths of Celsius base value is stored
+
+ nvmem-cell-names:
+ enum:
+ - trim_l
+ - trim_h
+ - trim_base
+ - trim_base_frac
+
resets:
minItems: 1
maxItems: 3
@@ -51,6 +66,12 @@ properties:
- const: tsadc
- const: tsadc-phy
+ "#address-cells":
+ const: 1
+
+ "#size-cells":
+ const: 0
+
"#thermal-sensor-cells":
const: 1
@@ -72,6 +93,29 @@ properties:
$ref: /schemas/types.yaml#/definitions/uint32
enum: [0, 1]
+patternProperties:
+ "^([a-z]+)@[0-9]+$":
+ type: object
+ properties:
+ reg:
+ maxItems: 1
+ description: sensor ID, a.k.a. channel number
+
+ nvmem-cells:
+ items:
+ - description: handle of cell containing low byte of calibration data
+ - description: handle of cell containing high byte of calibration data
+
+ nvmem-cell-names:
+ items:
+ - const: trim_l
+ - const: trim_h
+
+ required:
+ - reg
+
+ unevaluatedProperties: false
+
required:
- compatible
- reg
Several Rockchip SoCs, such as the RK3576, can store calibration trim data for thermal sensors in OTP cells. This capability should be documented. Such a rockchip thermal sensor may reference cell handles that store both a chip-wide trim for all the sensors, as well as cell handles for each individual sensor channel pointing to that specific sensor's trim value. Additionally, the thermal sensor may optionally reference cells which store the base in terms of degrees celsius and decicelsius that the trim is relative to. Signed-off-by: Nicolas Frattaroli <nicolas.frattaroli@collabora.com> --- .../bindings/thermal/rockchip-thermal.yaml | 44 ++++++++++++++++++++++ 1 file changed, 44 insertions(+)