From patchwork Mon Mar 10 00:12:50 2025 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jonas Karlman X-Patchwork-Id: 14009115 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 2E70CC28B28 for ; Mon, 10 Mar 2025 00:14:57 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-ID:Date:Subject:Cc:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=lcxdBWBDlrIza1E2kWcHCqECtFiBVcFXfCvl2xtP+VA=; b=xQiHxaOdqZssE1 70xdxn7rHy1CmHoEAD3PNfrUdcS2whWIvVbzCLA3qPn/RfRivqz0EK8vNvAXfdYTNj13VTIo7TjSO 6TDjEOsf0fCi2pn85M9sg2/7ZSNa2ASW5pmLQJsNUVhQztyhr5zJvn3uCOq+S3/rNQs31H4p6xaj3 SGO9Xfo34CDGV0yzqwhWQ24LjE8nB5PC5/ug2fIw5tfsNAF5qroD7zJeS3Lv9AYDwyWUr3OiG1phH nlGFJ2Hpay4ENeuxQxihXs2gEDEsIc3UDMaPoMxijxbho5d14I+bUio5HFWDyfp4dSttB1uwdHvBG igHSAJZHX3s/71AIqq/A==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.98 #2 (Red Hat Linux)) id 1trQnD-00000001JtR-0V85; Mon, 10 Mar 2025 00:14:51 +0000 Received: from smtp.forwardemail.net ([121.127.44.59]) by bombadil.infradead.org with esmtps (Exim 4.98 #2 (Red Hat Linux)) id 1trQlb-00000001JhN-2s0v for linux-rockchip@lists.infradead.org; Mon, 10 Mar 2025 00:13:12 +0000 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=kwiboo.se; h=Content-Transfer-Encoding: MIME-Version: References: In-Reply-To: Message-ID: Date: Subject: Cc: To: From; q=dns/txt; s=fe-e1b5cab7be; t=1741565591; bh=2XkeNvTS3SSQVo18wjKfb+aIkG+6ibmdSyCn5Cfxy74=; b=eHPZ7SgzqJWSSks5y/pZ/30iLzqiK5+5J39s7ZUNFK3UlymJ93cluoqAIPdVT54EwpXB0W+qY 6udTARxazpxiC0wfbSg33Hb1Z9Bmsp6c9bNQKC1nERqH67jRcSqD7Z653dNu0UIBcJUMwJbsgWl Je9yB8LO0bTLUqp4VC4OQr5PtG9JVUDVAPZdmd5GEqz3Ue9T3ADwzR+2x0jkz9rVU1aKJxSA/fL GaPYXS4L8N5rxd//rC8Li7xumrAuAbwkOwH2+JFma54XrGh7zniamPfp73Ji7YvxkV/nbCoijtZ LgZg5rurKj1JOTospufnkBGwTJeLCRpJKt7lRerXbmoA== X-Forward-Email-ID: 67ce2e93f812de2512d1f55a X-Forward-Email-Sender: rfc822; jonas@kwiboo.se, smtp.forwardemail.net, 121.127.44.59 X-Forward-Email-Version: 0.4.40 X-Forward-Email-Website: https://forwardemail.net X-Complaints-To: abuse@forwardemail.net X-Report-Abuse: abuse@forwardemail.net X-Report-Abuse-To: abuse@forwardemail.net From: Jonas Karlman To: Heiko Stuebner , Rob Herring , Krzysztof Kozlowski , Conor Dooley Cc: Yao Zi , Chukun Pan , linux-rockchip@lists.infradead.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Jonas Karlman Subject: [PATCH v2 1/2] arm64: dts: rockchip: Add GMAC nodes for RK3528 Date: Mon, 10 Mar 2025 00:12:50 +0000 Message-ID: <20250310001254.1516138-2-jonas@kwiboo.se> X-Mailer: git-send-email 2.48.1 In-Reply-To: <20250310001254.1516138-1-jonas@kwiboo.se> References: <20250310001254.1516138-1-jonas@kwiboo.se> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20250309_171311_887918_0DAD8D3B X-CRM114-Status: GOOD ( 10.18 ) X-BeenThere: linux-rockchip@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: Upstream kernel work for Rockchip platforms List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "Linux-rockchip" Errors-To: linux-rockchip-bounces+linux-rockchip=archiver.kernel.org@lists.infradead.org Rockchip RK3528 has two Ethernet controllers based on Synopsys DWC Ethernet QoS IP. Add device tree nodes for the two Ethernet controllers in RK3528. Signed-off-by: Jonas Karlman --- Changes in v2: - Add ethernet-phy@2 for the integrated PHY I have no board that expose an Ethernet port for the gmac0 and the integrated PHY. However, the PHY can be identified on addr 0x2 as 0044.1400 and in vendor kernel this relate to the Rockchip RK630 PHY. A proper PHY driver will be needed to support real use of gmac0. --- arch/arm64/boot/dts/rockchip/rk3528.dtsi | 105 +++++++++++++++++++++++ 1 file changed, 105 insertions(+) diff --git a/arch/arm64/boot/dts/rockchip/rk3528.dtsi b/arch/arm64/boot/dts/rockchip/rk3528.dtsi index 4c0a25cc089c..56ced7c640f1 100644 --- a/arch/arm64/boot/dts/rockchip/rk3528.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk3528.dtsi @@ -678,6 +678,111 @@ saradc: adc@ffae0000 { status = "disabled"; }; + gmac0: ethernet@ffbd0000 { + compatible = "rockchip,rk3528-gmac", "snps,dwmac-4.20a"; + reg = <0x0 0xffbd0000 0x0 0x10000>; + clocks = <&cru CLK_GMAC0_SRC>, <&cru CLK_GMAC0_RMII_50M>, + <&cru CLK_GMAC0_RX>, <&cru CLK_GMAC0_TX>, + <&cru PCLK_MAC_VO>, <&cru ACLK_MAC_VO>; + clock-names = "stmmaceth", "clk_mac_ref", + "mac_clk_rx", "mac_clk_tx", + "pclk_mac", "aclk_mac"; + interrupts = , + ; + interrupt-names = "macirq", "eth_wake_irq"; + phy-handle = <&rmii0_phy>; + phy-mode = "rmii"; + resets = <&cru SRST_A_MAC_VO>; + reset-names = "stmmaceth"; + rockchip,grf = <&vo_grf>; + snps,axi-config = <&gmac0_stmmac_axi_setup>; + snps,mixed-burst; + snps,mtl-rx-config = <&gmac0_mtl_rx_setup>; + snps,mtl-tx-config = <&gmac0_mtl_tx_setup>; + snps,tso; + status = "disabled"; + + mdio0: mdio { + compatible = "snps,dwmac-mdio"; + #address-cells = <0x1>; + #size-cells = <0x0>; + + rmii0_phy: ethernet-phy@2 { + compatible = "ethernet-phy-ieee802.3-c22"; + reg = <0x2>; + clocks = <&cru CLK_MACPHY>; + phy-is-integrated; + pinctrl-names = "default"; + pinctrl-0 = <&fephym0_led_link>, + <&fephym0_led_spd>; + resets = <&cru SRST_MACPHY>; + }; + }; + + gmac0_stmmac_axi_setup: stmmac-axi-config { + snps,blen = <0 0 0 0 16 8 4>; + snps,rd_osr_lmt = <8>; + snps,wr_osr_lmt = <4>; + }; + + gmac0_mtl_rx_setup: rx-queues-config { + snps,rx-queues-to-use = <1>; + queue0 {}; + }; + + gmac0_mtl_tx_setup: tx-queues-config { + snps,tx-queues-to-use = <1>; + queue0 {}; + }; + }; + + gmac1: ethernet@ffbe0000 { + compatible = "rockchip,rk3528-gmac", "snps,dwmac-4.20a"; + reg = <0x0 0xffbe0000 0x0 0x10000>; + clocks = <&cru CLK_GMAC1_SRC_VPU>, + <&cru CLK_GMAC1_RMII_VPU>, + <&cru PCLK_MAC_VPU>, + <&cru ACLK_MAC_VPU>; + clock-names = "stmmaceth", + "clk_mac_ref", + "pclk_mac", + "aclk_mac"; + interrupts = , + ; + interrupt-names = "macirq", "eth_wake_irq"; + resets = <&cru SRST_A_MAC>; + reset-names = "stmmaceth"; + rockchip,grf = <&vpu_grf>; + snps,axi-config = <&gmac1_stmmac_axi_setup>; + snps,mixed-burst; + snps,mtl-rx-config = <&gmac1_mtl_rx_setup>; + snps,mtl-tx-config = <&gmac1_mtl_tx_setup>; + snps,tso; + status = "disabled"; + + mdio1: mdio { + compatible = "snps,dwmac-mdio"; + #address-cells = <0x1>; + #size-cells = <0x0>; + }; + + gmac1_stmmac_axi_setup: stmmac-axi-config { + snps,blen = <0 0 0 0 16 8 4>; + snps,rd_osr_lmt = <8>; + snps,wr_osr_lmt = <4>; + }; + + gmac1_mtl_rx_setup: rx-queues-config { + snps,rx-queues-to-use = <1>; + queue0 {}; + }; + + gmac1_mtl_tx_setup: tx-queues-config { + snps,tx-queues-to-use = <1>; + queue0 {}; + }; + }; + sdhci: mmc@ffbf0000 { compatible = "rockchip,rk3528-dwcmshc", "rockchip,rk3588-dwcmshc";