diff mbox

ARM: dts: rockchip: add rk3288 arm-pmu irq affinity

Message ID 3814250.tDdID2FGKL@diego (mailing list archive)
State New, archived
Headers show

Commit Message

Heiko Stübner July 15, 2015, 9:22 p.m. UTC 
The rk3288 uses spi irqs for the arm-pmu on individual cpu cores, so needs
the affinity to them defined.

Signed-off-by: Heiko Stuebner <heiko@sntech.de>
---
 arch/arm/boot/dts/rk3288.dtsi | 7 ++++---
 1 file changed, 4 insertions(+), 3 deletions(-)

Comments

Sonny Rao July 16, 2015, 6:24 p.m. UTC | #1 
On Wed, Jul 15, 2015 at 2:22 PM, Heiko Stübner <heiko@sntech.de> wrote:
> The rk3288 uses spi irqs for the arm-pmu on individual cpu cores, so needs
> the affinity to them defined.
>
> Signed-off-by: Heiko Stuebner <heiko@sntech.de>
> ---
>  arch/arm/boot/dts/rk3288.dtsi | 7 ++++---
>  1 file changed, 4 insertions(+), 3 deletions(-)
>
> diff --git a/arch/arm/boot/dts/rk3288.dtsi b/arch/arm/boot/dts/rk3288.dtsi
> index 22e9221..2db91c9 100644
> --- a/arch/arm/boot/dts/rk3288.dtsi
> +++ b/arch/arm/boot/dts/rk3288.dtsi
> @@ -78,6 +78,7 @@
>                              <GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>,
>                              <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>,
>                              <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>;
> +               interrupt-affinity = <&cpu0>, <&cpu1>, <&cpu2>, <&cpu3>;
>         };
>
>         cpus {
> @@ -110,19 +111,19 @@
>                         clock-latency = <40000>;
>                         clocks = <&cru ARMCLK>;
>                 };
> -               cpu@501 {
> +               cpu1: cpu@501 {
>                         device_type = "cpu";
>                         compatible = "arm,cortex-a12";
>                         reg = <0x501>;
>                         resets = <&cru SRST_CORE1>;
>                 };
> -               cpu@502 {
> +               cpu2: cpu@502 {
>                         device_type = "cpu";
>                         compatible = "arm,cortex-a12";
>                         reg = <0x502>;
>                         resets = <&cru SRST_CORE2>;
>                 };
> -               cpu@503 {
> +               cpu3: cpu@503 {
>                         device_type = "cpu";
>                         compatible = "arm,cortex-a12";
>                         reg = <0x503>;
> --
> 2.1.4
>
>

Reviewed-by: Sonny Rao <sonnyrao@chromium.org>
Heiko Stübner July 16, 2015, 8:25 p.m. UTC | #2 
Am Mittwoch, 15. Juli 2015, 23:22:20 schrieb Heiko Stübner:
> The rk3288 uses spi irqs for the arm-pmu on individual cpu cores, so needs
> the affinity to them defined.
> 
> Signed-off-by: Heiko Stuebner <heiko@sntech.de>
> ---

applied to my dts branch for 4.3 with Sonny's review.
diff mbox

Patch

diff --git a/arch/arm/boot/dts/rk3288.dtsi b/arch/arm/boot/dts/rk3288.dtsi
index 22e9221..2db91c9 100644
--- a/arch/arm/boot/dts/rk3288.dtsi
+++ b/arch/arm/boot/dts/rk3288.dtsi
@@ -78,6 +78,7 @@ 
 			     <GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>,
 			     <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>,
 			     <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>;
+		interrupt-affinity = <&cpu0>, <&cpu1>, <&cpu2>, <&cpu3>;
 	};
 
 	cpus {
@@ -110,19 +111,19 @@ 
 			clock-latency = <40000>;
 			clocks = <&cru ARMCLK>;
 		};
-		cpu@501 {
+		cpu1: cpu@501 {
 			device_type = "cpu";
 			compatible = "arm,cortex-a12";
 			reg = <0x501>;
 			resets = <&cru SRST_CORE1>;
 		};
-		cpu@502 {
+		cpu2: cpu@502 {
 			device_type = "cpu";
 			compatible = "arm,cortex-a12";
 			reg = <0x502>;
 			resets = <&cru SRST_CORE2>;
 		};
-		cpu@503 {
+		cpu3: cpu@503 {
 			device_type = "cpu";
 			compatible = "arm,cortex-a12";
 			reg = <0x503>;