From patchwork Mon Sep 22 21:36:01 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Max Schwarz X-Patchwork-Id: 4950531 Return-Path: X-Original-To: patchwork-linux-rockchip@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork1.web.kernel.org (Postfix) with ESMTP id 608D99F2BB for ; Mon, 22 Sep 2014 21:36:44 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 1051F20121 for ; Mon, 22 Sep 2014 21:36:43 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.9]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id A3356200EC for ; Mon, 22 Sep 2014 21:36:41 +0000 (UTC) Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1XWBHg-00052Q-AH; Mon, 22 Sep 2014 21:36:36 +0000 Received: from mout.kundenserver.de ([212.227.17.24]) by bombadil.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1XWBHe-0004zR-JS for linux-rockchip@lists.infradead.org; Mon, 22 Sep 2014 21:36:35 +0000 Received: from typ.localnet (xdsl-89-0-153-215.netcologne.de [89.0.153.215]) by mrelayeu.kundenserver.de (node=mreue103) with ESMTP (Nemesis) id 0MNN9N-1Xd32R2qHx-006ynI; Mon, 22 Sep 2014 23:36:03 +0200 From: Max Schwarz To: linux-rockchip@lists.infradead.org Subject: [PATCH v4 RFC] i2c: rk3x: handle dynamic clock rate changes correctly Date: Mon, 22 Sep 2014 23:36:01 +0200 Message-ID: <38150529.7Nm2HqTn1y@typ> User-Agent: KMail/4.13.3 (Linux/3.15.7-031507-generic; KDE/4.13.3; x86_64; ; ) MIME-Version: 1.0 X-Provags-ID: V02:K0:GWvyJZR/KuVu/oAmNM/MjQ4mD6KnFsa427bURZkgXoM v2A3MVew4UpoPN6u1I8oFQn0IvGgy/PwUMgozv39Z7F+FoFRlu lC2T0SmaU1WmmidB9H1pOCVTKfkVgY0fDJASnWHYfRETmI6lB1 DumHDNB7wSLQPcE/clyPZ7pfbVwNG8D270rnQ7MR0TwSSRtqzu x1wXSVHvrKCu1rtIl0kwXj6xWyAaDvZck58Mo55eOYCF4lXtzn +6ToEE2qUMBZ69RK3BUQeg+3WwVeASruYodUM8TpGOUs35KM0n SukjnFQvsWdDaxwaVKYOOQUMCsZ0q2aiMHE9rybnlsiHU/sfA= = X-UI-Out-Filterresults: notjunk:1; X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20140922_143634_985319_18D2C9A4 X-CRM114-Status: GOOD ( 20.56 ) X-Spam-Score: -0.2 (/) Cc: Huang Tao , addy ke , Doug Anderson , Heiko =?ISO-8859-1?Q?St=FCbner?= , Wolfram Sang X-BeenThere: linux-rockchip@lists.infradead.org X-Mailman-Version: 2.1.18-1 Precedence: list List-Id: Upstream kernel work for Rockchip platforms List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "Linux-rockchip" Errors-To: linux-rockchip-bounces+patchwork-linux-rockchip=patchwork.kernel.org@lists.infradead.org X-Spam-Status: No, score=-2.9 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_NONE, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP The i2c input clock can change dynamically, e.g. on the RK3066 where pclk_i2c0 and pclk_i2c1 are connected to the armclk, which changes rate on cpu frequency scaling. Until now, we incorrectly called clk_get_rate() while holding the i2c->lock in rk3x_i2c_xfer() to adapt to clock rate changes. Thanks to Huang Tao for reporting this issue. Do it properly now using the clk notifier framework. The callback logic was taken from i2c-cadence.c. Signed-off-by: Max Schwarz Tested-by: Max Schwarz on RK3188 (dynamic rate changes are untested!) Reviewed-by: Doug Anderson Tested-by: Doug Anderson --- This is based on Wolframs' i2c/for-current branch, since that includes the recent divisor fix by Addy Ke (b4a7bd7a38). Changes since v3: - drop leftover write-only clk_freq variable (sugg. by Doug Anderson) Changes since v2: - allow rate changes which result in lower than desired SCL frequencies (sugg. by Doug Anderson) - simplified divider range checks (Doug Anderson) - removed duplicate clk_enable()/disable() (Doug Anderson) - added missing unregister in rk3x_i2c_remove() (Doug Anderson) Changes since v1: - make sure the i2c input clock is active during prescaler register write by explicitly enabling/disabling it in rk3x_i2c_set_scl_frequency(). Bug found by Addy Ke. It would still be awesome if someone with an RK3066 could test this. Heiko suggested using a script by Doug for stress-testing frequency changes: cd /sys/devices/system/cpu/cpu0/cpufreq echo userspace > scaling_governor unset FREQS read -a FREQS < scaling_available_frequencies RANDOM=$$$(date +%s) while true; do FREQ=${FREQS[$RANDOM % ${#FREQS[@]} ]} echo Now ${FREQ} echo ${FREQ} > scaling_setspeed done If you run some I2C transactions at the same time (e.g. using i2cget) that would be enough to confirm that everything still works. Cheers, Max drivers/i2c/busses/i2c-rk3x.c | 128 +++++++++++++++++++++++++++++++++++++++--- 1 file changed, 120 insertions(+), 8 deletions(-) diff --git a/drivers/i2c/busses/i2c-rk3x.c b/drivers/i2c/busses/i2c-rk3x.c index 93cfc83..7f5e440 100644 --- a/drivers/i2c/busses/i2c-rk3x.c +++ b/drivers/i2c/busses/i2c-rk3x.c @@ -97,6 +97,7 @@ struct rk3x_i2c { /* Hardware resources */ void __iomem *regs; struct clk *clk; + struct notifier_block clk_rate_nb; /* Settings */ unsigned int scl_frequency; @@ -428,18 +429,119 @@ out: return IRQ_HANDLED; } -static void rk3x_i2c_set_scl_rate(struct rk3x_i2c *i2c, unsigned long scl_rate) +/** + * Calculate divider value for desired SCL frequency + * + * @clk_rate: I2C input clock rate + * @scl_rate: Desired SCL rate + * @div: Divider output + * + * Return: 0 on success, -EINVAL on unreachable SCL rate. In that case + * a best-effort divider value is returned in div. + **/ +static int rk3x_i2c_calc_div(unsigned long clk_rate, unsigned long scl_rate, + unsigned int *div) { - unsigned long i2c_rate = clk_get_rate(i2c->clk); - unsigned int div; + unsigned long div_tmp; /* set DIV = DIVH = DIVL * SCL rate = (clk rate) / (8 * (DIVH + 1 + DIVL + 1)) * = (clk rate) / (16 * (DIV + 1)) */ - div = DIV_ROUND_UP(i2c_rate, scl_rate * 16) - 1; + div_tmp = DIV_ROUND_UP(clk_rate, scl_rate * 16) - 1; + if (div_tmp > 0xFFFF) { + /* The input clock is too fast. Reject this rate change. */ + *div = 0xFFFF; + return -EINVAL; + } + + *div = div_tmp; + + return 0; +} + +/** + * Setup divider register for desired SCL frequency + * + * @scl_rate: Desired SCL Rate + **/ +static void rk3x_i2c_set_scl_rate(struct rk3x_i2c *i2c, unsigned long scl_rate) +{ + unsigned long i2c_rate = clk_get_rate(i2c->clk); + unsigned int div; + int ret; + + ret = rk3x_i2c_calc_div(i2c_rate, scl_rate, &div); + + WARN_ONCE(ret != 0, "Could not reach desired SCL freq %lu", scl_rate); + + /* + * We might be called from rk3x_i2c_probe or from the clk rate change + * notifier. In that case, the i2c clk is not running. So enable it + * explicitly here during the register write. + * + * Writing the register with halted clock crashes the system at least on + * RK3288. + */ + + clk_enable(i2c->clk); i2c_writel(i2c, (div << 16) | (div & 0xffff), REG_CLKDIV); + clk_disable(i2c->clk); +} + +/** + * rk3x_i2c_clk_notifier_cb - Clock rate change callback + * @nb: Pointer to notifier block + * @event: Notification reason + * @data: Pointer to notification data object + * + * The callback checks whether a valid bus frequency can be generated after the + * change. If so, the change is acknowledged, otherwise the change is aborted. + * New dividers are written to the HW in the pre- or post change notification + * depending on the scaling direction. + * + * Code adapted from i2c-cadence.c. + * + * Return: NOTIFY_STOP if the rate change should be aborted, NOTIFY_OK + * to acknowedge the change, NOTIFY_DONE if the notification is + * considered irrelevant. + */ +static int rk3x_i2c_clk_notifier_cb(struct notifier_block *nb, unsigned long + event, void *data) +{ + struct clk_notifier_data *ndata = data; + struct rk3x_i2c *i2c = container_of(nb, struct rk3x_i2c, clk_rate_nb); + + switch (event) { + case PRE_RATE_CHANGE: + { + unsigned int div; + + if (rk3x_i2c_calc_div(ndata->new_rate, i2c->scl_frequency, + &div) != 0) { + return NOTIFY_STOP; + } + + /* scale up */ + if (ndata->new_rate > ndata->old_rate) + rk3x_i2c_set_scl_rate(i2c, ndata->new_rate); + + return NOTIFY_OK; + } + case POST_RATE_CHANGE: + /* scale down */ + if (ndata->new_rate < ndata->old_rate) + rk3x_i2c_set_scl_rate(i2c, ndata->new_rate); + return NOTIFY_OK; + case ABORT_RATE_CHANGE: + /* scale up */ + if (ndata->new_rate > ndata->old_rate) + rk3x_i2c_set_scl_rate(i2c, ndata->old_rate); + return NOTIFY_OK; + default: + return NOTIFY_DONE; + } } /** @@ -536,9 +638,6 @@ static int rk3x_i2c_xfer(struct i2c_adapter *adap, clk_enable(i2c->clk); - /* The clock rate might have changed, so setup the divider again */ - rk3x_i2c_set_scl_rate(i2c, i2c->scl_frequency); - i2c->is_last_msg = false; /* @@ -724,16 +823,27 @@ static int rk3x_i2c_probe(struct platform_device *pdev) return ret; } + i2c->clk_rate_nb.notifier_call = rk3x_i2c_clk_notifier_cb; + ret = clk_notifier_register(i2c->clk, &i2c->clk_rate_nb); + if (ret != 0) { + dev_err(&pdev->dev, "Unable to register clock notifier\n"); + goto err_clk; + } + + rk3x_i2c_set_scl_rate(i2c, i2c->scl_frequency); + ret = i2c_add_adapter(&i2c->adap); if (ret < 0) { dev_err(&pdev->dev, "Could not register adapter\n"); - goto err_clk; + goto err_clk_notifier; } dev_info(&pdev->dev, "Initialized RK3xxx I2C bus at %p\n", i2c->regs); return 0; +err_clk_notifier: + clk_notifier_unregister(i2c->clk, &i2c->clk_rate_nb); err_clk: clk_unprepare(i2c->clk); return ret; @@ -744,6 +854,8 @@ static int rk3x_i2c_remove(struct platform_device *pdev) struct rk3x_i2c *i2c = platform_get_drvdata(pdev); i2c_del_adapter(&i2c->adap); + + clk_notifier_unregister(i2c->clk, &i2c->clk_rate_nb); clk_unprepare(i2c->clk); return 0;