From patchwork Sat Jan 30 12:39:11 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: =?utf-8?q?Heiko_St=C3=BCbner?= X-Patchwork-Id: 8171241 Return-Path: X-Original-To: patchwork-linux-rockchip@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork2.web.kernel.org (Postfix) with ESMTP id A4491BEEE5 for ; Sat, 30 Jan 2016 13:57:44 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 657DA20392 for ; Sat, 30 Jan 2016 13:57:43 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.9]) (using TLSv1.2 with cipher AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 22CD8201C0 for ; Sat, 30 Jan 2016 13:57:42 +0000 (UTC) Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.80.1 #2 (Red Hat Linux)) id 1aPW21-0004bi-Q3; Sat, 30 Jan 2016 13:57:41 +0000 Received: from gloria.sntech.de ([95.129.55.99]) by bombadil.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1aPW1b-0004Si-5w; Sat, 30 Jan 2016 13:57:18 +0000 Received: from [151.216.141.62] (helo=phil.localnet) by gloria.sntech.de with esmtpsa (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:256) (Exim 4.80) (envelope-from ) id 1aPW19-0001eO-FO; Sat, 30 Jan 2016 14:56:47 +0100 From: Heiko Stuebner To: David Wu Subject: Re: [PATCH] PM / AVS: rockchip-io: add GRF and PMUGRF types to distinguish Date: Sat, 30 Jan 2016 13:39:11 +0100 Message-ID: <5387650.lAgTxexlF2@phil> User-Agent: KMail/4.14.10 (Linux/4.3.0-1-amd64; KDE/4.14.14; x86_64; ; ) In-Reply-To: <1454155305-55516-1-git-send-email-david.wu@rock-chips.com> References: <1454155305-55516-1-git-send-email-david.wu@rock-chips.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20160130_055715_484532_9787A0E2 X-CRM114-Status: GOOD ( 26.76 ) X-Spam-Score: -1.9 (-) X-BeenThere: linux-rockchip@lists.infradead.org X-Mailman-Version: 2.1.20 Precedence: list List-Id: Upstream kernel work for Rockchip platforms List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: nm@ti.com, huangtao@rock-chips.com, khilman@kernel.org, linux-pm@vger.kernel.org, linux-kernel@vger.kernel.org, zyw@rock-chips.com, xjq@rock-chips.com, cf@rock-chips.com, linux-rockchip@lists.infradead.org, linux-arm-kernel@lists.infradead.org Sender: "Linux-rockchip" Errors-To: linux-rockchip-bounces+patchwork-linux-rockchip=patchwork.kernel.org@lists.infradead.org X-Spam-Status: No, score=-4.2 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_MED, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Hi David, Am Samstag, 30. Januar 2016, 20:01:45 schrieb David Wu: > As rk3368 contained two separated iodomain areas, this was > determined to use which regmap base address. > > Signed-off-by: David Wu I don't think we need to specify this on a driver level. Both GRF areas are "General register files" only located in two separate power-domains. So the rockchip,grf property should work for both. Especially as nothing keeps designers from introducing yet another GRF-area somewhere else ;-) From when I started working on the rk3368, I still have a preliminary patches for that sitting here, so I've attached on how I envisoned that to work. Heiko > --- > drivers/power/avs/rockchip-io-domain.c | 32 > ++++++++++++++++++++++++-------- 1 file changed, 24 insertions(+), 8 > deletions(-) > > diff --git a/drivers/power/avs/rockchip-io-domain.c > b/drivers/power/avs/rockchip-io-domain.c index 8099456..b17aeb7 100644 > --- a/drivers/power/avs/rockchip-io-domain.c > +++ b/drivers/power/avs/rockchip-io-domain.c > @@ -47,6 +47,11 @@ > #define RK3368_SOC_CON15_FLASH0 BIT(14) > #define RK3368_SOC_FLASH_SUPPLY_NUM 2 > > +enum rockchip_iodomain_grf_type { > + GRF, > + PMUGRF > +}; > + > struct rockchip_iodomain; > > /** > @@ -54,6 +59,7 @@ struct rockchip_iodomain; > */ > struct rockchip_iodomain_soc_data { > int grf_offset; > + enum rockchip_iodomain_grf_type type; > const char *supply_names[MAX_SUPPLIES]; > void (*init)(struct rockchip_iodomain *iod); > }; > @@ -67,7 +73,7 @@ struct rockchip_iodomain_supply { > > struct rockchip_iodomain { > struct device *dev; > - struct regmap *grf; > + struct regmap *base; > struct rockchip_iodomain_soc_data *soc_data; > struct rockchip_iodomain_supply supplies[MAX_SUPPLIES]; > }; > @@ -86,7 +92,7 @@ static int rockchip_iodomain_write(struct > rockchip_iodomain_supply *supply, /* apply hiword-mask */ > val |= (BIT(supply->idx) << 16); > > - ret = regmap_write(iod->grf, iod->soc_data->grf_offset, val); > + ret = regmap_write(iod->base, iod->soc_data->grf_offset, val); > if (ret) > dev_err(iod->dev, "Couldn't write to GRF\n"); > > @@ -157,7 +163,7 @@ static void rk3288_iodomain_init(struct > rockchip_iodomain *iod) * instead of a special gpio. > */ > val = RK3288_SOC_CON2_FLASH0 | (RK3288_SOC_CON2_FLASH0 << 16); > - ret = regmap_write(iod->grf, RK3288_SOC_CON2, val); > + ret = regmap_write(iod->base, RK3288_SOC_CON2, val); > if (ret < 0) > dev_warn(iod->dev, "couldn't update flash0 ctrl\n"); > } > @@ -176,7 +182,7 @@ static void rk3368_iodomain_init(struct > rockchip_iodomain *iod) * instead of a special gpio. > */ > val = RK3368_SOC_CON15_FLASH0 | (RK3368_SOC_CON15_FLASH0 << 16); > - ret = regmap_write(iod->grf, RK3368_SOC_CON15, val); > + ret = regmap_write(iod->base, RK3368_SOC_CON15, val); > if (ret < 0) > dev_warn(iod->dev, "couldn't update flash0 ctrl\n"); > } > @@ -187,6 +193,7 @@ static void rk3368_iodomain_init(struct > rockchip_iodomain *iod) */ > static const struct rockchip_iodomain_soc_data soc_data_rk3188 = { > .grf_offset = 0x104, > + .type = GRF, > .supply_names = { > NULL, > NULL, > @@ -209,6 +216,7 @@ static const struct rockchip_iodomain_soc_data > soc_data_rk3188 = { > > static const struct rockchip_iodomain_soc_data soc_data_rk3288 = { > .grf_offset = 0x380, > + .type = GRF, > .supply_names = { > "lcdc", /* LCDC_VDD */ > "dvp", /* DVPIO_VDD */ > @@ -226,6 +234,7 @@ static const struct rockchip_iodomain_soc_data > soc_data_rk3288 = { > > static const struct rockchip_iodomain_soc_data soc_data_rk3368 = { > .grf_offset = 0x900, > + .type = GRF, > .supply_names = { > NULL, /* reserved */ > "dvp", /* DVPIO_VDD */ > @@ -242,6 +251,7 @@ static const struct rockchip_iodomain_soc_data > soc_data_rk3368 = { > > static const struct rockchip_iodomain_soc_data soc_data_rk3368_pmu = { > .grf_offset = 0x100, > + .type = PMUGRF, > .supply_names = { > NULL, > NULL, > @@ -293,10 +303,16 @@ static int rockchip_iodomain_probe(struct > platform_device *pdev) match = of_match_node(rockchip_iodomain_match, > np); > iod->soc_data = (struct rockchip_iodomain_soc_data *)match->data; > > - iod->grf = syscon_regmap_lookup_by_phandle(np, "rockchip,grf"); > - if (IS_ERR(iod->grf)) { > - dev_err(&pdev->dev, "couldn't find grf regmap\n"); > - return PTR_ERR(iod->grf); > + if (iod->soc_data->type == PMUGRF) > + iod->base = syscon_regmap_lookup_by_phandle( > + np, "rockchip,pmugrf"); > + else > + iod->base = syscon_regmap_lookup_by_phandle( > + np, "rockchip,grf"); > + if (IS_ERR(iod->base)) { > + dev_err(&pdev->dev, "couldn't find %s regmap\n", > + (iod->soc_data->type == PMUGRF) ? "pmugrf" : "grf"); > + return PTR_ERR(iod->base); > } > > for (i = 0; i < MAX_SUPPLIES; i++) { From 76fc704626e611180223ac99e4067c30c464dd23 Mon Sep 17 00:00:00 2001 From: Heiko Stuebner Date: Wed, 29 Jul 2015 16:13:35 +0200 Subject: [PATCH 2/2] arm64: dts: rockchip: add rk3368 iodomains probably unfinished --- diff --git a/arch/arm64/boot/dts/rockchip/rk3368-r88.dts b/arch/arm64/boot/dts/rockchip/rk3368-r88.dts index 401a812..6547f1e 100644 --- a/arch/arm64/boot/dts/rockchip/rk3368-r88.dts +++ b/arch/arm64/boot/dts/rockchip/rk3368-r88.dts @@ -89,6 +89,25 @@ }; }; + io-domains { + compatible = "rockchip,rk3368-io-voltage-domain"; + rockchip,grf = <&grf>; + + audio-supply = <&vcc_io>; + gpio30-supply = <&vcc_io>; + gpio1830-supply = <&vcc_io>; + sdcard-supply = <&vccio_sd>; + wifi-supply = <&vccio_wl>; + }; + + pmu-io-domains { + compatible = "rockchip,rk3368-pmu-io-voltage-domain"; + rockchip,grf = <&pmugrf>; + + pmu-supply = <&vcc_io>; + vop-supply = <&vcc_io>; + }; + ir: ir-receiver { compatible = "gpio-ir-receiver"; gpios = <&gpio3 30 GPIO_ACTIVE_LOW>; -- 2.6.4