| Message ID | 5857488.K3ESyq6uAh@phil (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
diff --git a/drivers/clk/rockchip/clk-mmc-phase.c b/drivers/clk/rockchip/clk-mmc-phase.c index bc856f2..4601130 100644 --- a/drivers/clk/rockchip/clk-mmc-phase.c +++ b/drivers/clk/rockchip/clk-mmc-phase.c @@ -154,6 +154,7 @@ struct clk *rockchip_clk_register_mmc(const char *name, return ERR_PTR(-ENOMEM); init.name = name; + init.flags = 0; init.num_parents = num_parents; init.parent_names = parent_names; init.ops = &rockchip_mmc_clk_ops;
The flags element of clk_init_data was never initialized for mmc- phase-clocks resulting in the element containing a random value and thus possibly enabling unwanted clock flags. Fixes: 89bf26cbc1a0 ("clk: rockchip: Add support for the mmc clock phases using the framework") Cc: stable@vger.kernel.org Signed-off-by: Heiko Stuebner <heiko@sntech.de> --- Found while investigating the critical clock locking in __clk_core_init as it generated a bunch of warnings due to the (random) flags containing the critical clock bit in most cases. I've also already applied this to my fixes branch, so posted for reference / shouting if it's terrible wrong :-) drivers/clk/rockchip/clk-mmc-phase.c | 1 + 1 file changed, 1 insertion(+)