| Message ID | 5a7bd2cd8703e51382abfc11242de59d45286477.1708381247.git.efectn@protonmail.com (mailing list archive) |
|---|---|
| State | New |
| Headers | show |
| Series | [1/9] arm64: dts: rockchip: Add cpu regulators and vcc5v0_sys to Khadas Edge 2 | expand |
Hi Heiko, Sorry if i bother you. Can you review the series? If there is a problem i will send the v2.
On Tue, 20 Feb 2024 01:34:17 +0300, efectn@6tel.net wrote: > From: Muhammed Efe Cetin <efectn@protonmail.com> > > This commit adds 5V fixed power regulator and CPU regulators to Khadas > Edge 2. > > Applied, thanks! [1/9] arm64: dts: rockchip: Add cpu regulators and vcc5v0_sys to Khadas Edge 2 commit: 925273ba9e71184a6dcde0f902b4245ed64885d1 [2/9] arm64: dts: rockchip: Add PMIC to Khadas Edge 2 commit: 3b5d2327cb749017322ce09f7107cdc82f1a92fa [3/9] arm64: dts: rockchip: Add TF card to Khadas Edge 2 commit: 4a3afe9cf3711f222a9dadf50bd2e9770bb6a095 [4/9] arm64: dts: rockchip: USB2, USB3 Host, PCIe2 to Khadas Edge 2 commit: f786eda805aa91340e151322ccc6c0ba4a591f9f [5/9] arm64: dts: rockchip: Add ir receiver and leds to Khadas Edge 2 commit: af6943f502b6db1ba3bc5199069c662218e23261 [6/9] arm64: dts: rockchip: Add saradc and adc buttons to Khadas Edge 2 and enable tsadc commit: 25e31aaebed4b0e242d9a71170f8dfdf9cc8a304 [7/9] arm64: dts: rockchip: Add SFC to Khadas Edge 2 commit: 8711dca3b5f7a3834ae1129512f98a2367940a07 [8/9] arm64: dts: rockchip: Add UART9 (bluetooth) to Khadas Edge 2 commit: e438acfda8a0088a3c7f450a7ffefeb56074e41e [9/9] arm64: dts: rockchip: Add RTC to Khadas Edge 2 commit: c0b3c764b64a5c8eee056e62580de0f44e7dcd0f Best regards,
diff --git a/arch/arm64/boot/dts/rockchip/rk3588s-khadas-edge2.dts b/arch/arm64/boot/dts/rockchip/rk3588s-khadas-edge2.dts index f53e993c785e..1d1ce70a0f3a 100644 --- a/arch/arm64/boot/dts/rockchip/rk3588s-khadas-edge2.dts +++ b/arch/arm64/boot/dts/rockchip/rk3588s-khadas-edge2.dts @@ -17,6 +17,87 @@ aliases { chosen { stdout-path = "serial2:1500000n8"; }; + + vcc5v0_sys: vcc5v0-sys-regulator { + compatible = "regulator-fixed"; + regulator-name = "vcc5v0_sys"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + }; +}; + +&cpu_b0 { + cpu-supply = <&vdd_cpu_big0_s0>; +}; + +&cpu_b1 { + cpu-supply = <&vdd_cpu_big0_s0>; +}; + +&cpu_b2 { + cpu-supply = <&vdd_cpu_big1_s0>; +}; + +&cpu_b3 { + cpu-supply = <&vdd_cpu_big1_s0>; +}; + +&cpu_l0 { + cpu-supply = <&vdd_cpu_lit_s0>; +}; + +&cpu_l1 { + cpu-supply = <&vdd_cpu_lit_s0>; +}; + +&cpu_l2 { + cpu-supply = <&vdd_cpu_lit_s0>; +}; + +&cpu_l3 { + cpu-supply = <&vdd_cpu_lit_s0>; +}; + +&i2c0 { + pinctrl-names = "default"; + pinctrl-0 = <&i2c0m2_xfer>; + status = "okay"; + + vdd_cpu_big0_s0: regulator@42 { + compatible = "rockchip,rk8602"; + reg = <0x42>; + fcs,suspend-voltage-selector = <1>; + regulator-name = "vdd_cpu_big0_s0"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <550000>; + regulator-max-microvolt = <1050000>; + regulator-ramp-delay = <2300>; + vin-supply = <&vcc5v0_sys>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vdd_cpu_big1_s0: regulator@43 { + compatible = "rockchip,rk8603", "rockchip,rk8602"; + reg = <0x43>; + fcs,suspend-voltage-selector = <1>; + regulator-name = "vdd_cpu_big1_s0"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <550000>; + regulator-max-microvolt = <1050000>; + regulator-ramp-delay = <2300>; + vin-supply = <&vcc5v0_sys>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; }; &sdhci {