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[81.204.249.205]) by smtp.gmail.com with ESMTPSA id d7-20020aa7c1c7000000b0045726e8a22bsm5554595edp.46.2022.09.29.07.04.06 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Thu, 29 Sep 2022 07:04:07 -0700 (PDT) Message-ID: <6eba6c10-9c96-b40f-937a-e02d43b04cd7@gmail.com> Date: Thu, 29 Sep 2022 16:04:06 +0200 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:91.0) Gecko/20100101 Thunderbird/91.13.0 From: Johan Jonker Subject: [RFC PATCH v1 2/2] ARM: dts: rk3288: add the interrupts property for PWM To: heiko@sntech.de Cc: thierry.reding@gmail.com, u.kleine-koenig@pengutronix.de, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, sebastian.reichel@collabora.com, wxt@rock-chips.com, kever.yang@rock-chips.com, linux-pwm@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org Content-Language: en-US X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220929_070410_987636_A741DC9F X-CRM114-Status: GOOD ( 10.31 ) X-BeenThere: linux-rockchip@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: Upstream kernel work for Rockchip platforms List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "Linux-rockchip" Errors-To: linux-rockchip-bounces+linux-rockchip=archiver.kernel.org@lists.infradead.org The Rockchip rk3288 SoC has 4-built-in PWM channels. Configurable to operate in capture mode. Measures the high/low polarity effective cycles of this input waveform Generates a single interrupt at the transition of input waveform polarity Configurable to operate in continuous mode or one-shot mode. One-shot operation will produce N + 1 periods of the waveform, where N is the repeat counter value, and generates a single interrupt at the end of operation. Continuous mode generates the waveform continuously and do not generates any interrupts. Add interrupts property to rk3288 PWM nodes. Signed-off-by: Caesar Wang Signed-off-by: Johan Jonker --- Original patch location: ARM: dts: rk3288: add the interrupts property for PWM https://github.com/rockchip-linux/kernel/commit/16b7b284618d1652e694f6286f575ce82f5f03e5 --- "rockchip,rk3288-pwm" is in use as fall back string for Rockchip SoCs with combined PWM interrupt. --- arch/arm/boot/dts/rk3288.dtsi | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/arch/arm/boot/dts/rk3288.dtsi b/arch/arm/boot/dts/rk3288.dtsi index 487b0e03d..1223aa369 100644 --- a/arch/arm/boot/dts/rk3288.dtsi +++ b/arch/arm/boot/dts/rk3288.dtsi @@ -675,6 +675,7 @@ pwm0: pwm@ff680000 { compatible = "rockchip,rk3288-pwm"; reg = <0x0 0xff680000 0x0 0x10>; + interrupts = ; #pwm-cells = <3>; pinctrl-names = "default"; pinctrl-0 = <&pwm0_pin>; @@ -685,6 +686,7 @@ pwm1: pwm@ff680010 { compatible = "rockchip,rk3288-pwm"; reg = <0x0 0xff680010 0x0 0x10>; + interrupts = ; #pwm-cells = <3>; pinctrl-names = "default"; pinctrl-0 = <&pwm1_pin>; @@ -695,6 +697,7 @@ pwm2: pwm@ff680020 { compatible = "rockchip,rk3288-pwm"; reg = <0x0 0xff680020 0x0 0x10>; + interrupts = ; #pwm-cells = <3>; pinctrl-names = "default"; pinctrl-0 = <&pwm2_pin>; @@ -705,6 +708,7 @@ pwm3: pwm@ff680030 { compatible = "rockchip,rk3288-pwm"; reg = <0x0 0xff680030 0x0 0x10>; + interrupts = ; #pwm-cells = <3>; pinctrl-names = "default"; pinctrl-0 = <&pwm3_pin>;