diff mbox series

[v3,3/3] arm64: dts: rockchip: add DT entry for RNG to RK356x

Message ID bd08c142ce6b32cd98014c875c7ccf3657c63f23.1718921174.git.daniel@makrotopia.org (mailing list archive)
State New
Headers show
Series hwrng: add hwrng support for Rockchip RK3568 | expand

Commit Message

Daniel Golle June 21, 2024, 1:25 a.m. UTC 
From: Aurelien Jarno <aurelien@aurel32.net>

Enable the just added Rockchip RNG driver for RK356x SoCs.

Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
Signed-off-by: Daniel Golle <daniel@makrotopia.org>
---
 arch/arm64/boot/dts/rockchip/rk356x.dtsi | 9 +++++++++
 1 file changed, 9 insertions(+)

Comments

Diederik de Haas June 21, 2024, 9:36 a.m. UTC | #1 
On Friday, 21 June 2024 03:25:30 CEST Daniel Golle wrote:
> diff --git a/arch/arm64/boot/dts/rockchip/rk356x.dtsi
> b/arch/arm64/boot/dts/rockchip/rk356x.dtsi index d8543b5557ee..57c8103500ea
> 100644
> --- a/arch/arm64/boot/dts/rockchip/rk356x.dtsi
> +++ b/arch/arm64/boot/dts/rockchip/rk356x.dtsi
> @@ -1855,6 +1855,15 @@ usb2phy1_otg: otg-port {
>                 };
>         };
> 
> +       rng: rng@fe388000 {
> +               compatible = "rockchip,rk3568-rng";
> +               reg = <0x0 0xfe388000 0x0 0x4000>;
> +               clocks = <&cru CLK_TRNG_NS>, <&cru HCLK_TRNG_NS>;
> +               clock-names = "core", "ahb";
> +               resets = <&cru SRST_TRNG_NS>;
> +               reset-names = "reset";
> +       };
> +
>         pinctrl: pinctrl {
>                 compatible = "rockchip,rk3568-pinctrl";
>                 rockchip,grf = <&grf>;
> --

I had placed the node between ``sdhci: mmc@fe310000`` and
``i2s0_8ch: i2s@fe400000`` which I think is the proper order.

Cheers,
  Diederik
Heiko Stuebner June 21, 2024, 9:49 a.m. UTC | #2 
Am Freitag, 21. Juni 2024, 11:36:45 CEST schrieb Diederik de Haas:
> On Friday, 21 June 2024 03:25:30 CEST Daniel Golle wrote:
> > diff --git a/arch/arm64/boot/dts/rockchip/rk356x.dtsi
> > b/arch/arm64/boot/dts/rockchip/rk356x.dtsi index d8543b5557ee..57c8103500ea
> > 100644
> > --- a/arch/arm64/boot/dts/rockchip/rk356x.dtsi
> > +++ b/arch/arm64/boot/dts/rockchip/rk356x.dtsi
> > @@ -1855,6 +1855,15 @@ usb2phy1_otg: otg-port {
> >                 };
> >         };
> > 
> > +       rng: rng@fe388000 {
> > +               compatible = "rockchip,rk3568-rng";
> > +               reg = <0x0 0xfe388000 0x0 0x4000>;
> > +               clocks = <&cru CLK_TRNG_NS>, <&cru HCLK_TRNG_NS>;
> > +               clock-names = "core", "ahb";
> > +               resets = <&cru SRST_TRNG_NS>;
> > +               reset-names = "reset";
> > +       };
> > +
> >         pinctrl: pinctrl {
> >                 compatible = "rockchip,rk3568-pinctrl";
> >                 rockchip,grf = <&grf>;
> > --
> 
> I had placed the node between ``sdhci: mmc@fe310000`` and
> ``i2s0_8ch: i2s@fe400000`` which I think is the proper order.

correct.
If a node has an address in its name, sort by that address.
diff mbox series

Patch

diff --git a/arch/arm64/boot/dts/rockchip/rk356x.dtsi b/arch/arm64/boot/dts/rockchip/rk356x.dtsi
index d8543b5557ee..57c8103500ea 100644
--- a/arch/arm64/boot/dts/rockchip/rk356x.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk356x.dtsi
@@ -1855,6 +1855,15 @@  usb2phy1_otg: otg-port {
 		};
 	};
 
+	rng: rng@fe388000 {
+		compatible = "rockchip,rk3568-rng";
+		reg = <0x0 0xfe388000 0x0 0x4000>;
+		clocks = <&cru CLK_TRNG_NS>, <&cru HCLK_TRNG_NS>;
+		clock-names = "core", "ahb";
+		resets = <&cru SRST_TRNG_NS>;
+		reset-names = "reset";
+	};
+
 	pinctrl: pinctrl {
 		compatible = "rockchip,rk3568-pinctrl";
 		rockchip,grf = <&grf>;