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It was tested using `spidev_test' tool in all possible modes: - Polling mode: xfer_size <= 32 - IRQ mode: 64 >= xfer_size >= 32 - DMA mode: xfer_size > 64 with 200 kHz ... 49.9 MHz SPI frequencies. The next 3 approaches were used: 1. Software loopback ('-l' option for `spidev_test' tool) 2. Hardware loopback (by connecting MISO line to MOSI) 3. By communicating with ATMega found on Sensors Mezzanine board [1], programmed to act as an SPI slave device and all the transactions were additionally checked on my Logic Analyzer to make sure the SCK frequencies were actually correct. This series is supposed to go via SPI tree. All other related SPI changes are independent from this series and will go via Krzysztof's tree. Changes in v2: - Collected R-b tags - Split the initial submission [1] by 2 patch series - Changed bindings patch title to "spi: dt-bindings: ..." [1] https://www.96boards.org/product/sensors-mezzanine/ [2] https://lore.kernel.org/all/20240120012948.8836-1-semen.protsenko@linaro.org/ Sam Protsenko (2): spi: dt-bindings: samsung: Add Exynos850 SPI spi: s3c64xx: Add Exynos850 support .../devicetree/bindings/spi/samsung,spi.yaml | 1 + drivers/spi/spi-s3c64xx.c | 14 ++++++++++++++ 2 files changed, 15 insertions(+)