Message ID | 20240804215458.404085-1-virag.david003@gmail.com (mailing list archive) |
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Sun, 04 Aug 2024 14:55:01 -0700 (PDT) Received: from localhost.localdomain ([2a02:ab88:3711:c80:e7a7:e025:f1a5:ef78]) by smtp.googlemail.com with ESMTPSA id a640c23a62f3a-a7dc9d45452sm370485066b.111.2024.08.04.14.55.00 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 04 Aug 2024 14:55:01 -0700 (PDT) From: David Virag <virag.david003@gmail.com> To: Vinod Koul <vkoul@kernel.org>, Kishon Vijay Abraham I <kishon@kernel.org>, Rob Herring <robh@kernel.org>, Krzysztof Kozlowski <krzk+dt@kernel.org>, Conor Dooley <conor+dt@kernel.org>, Greg Kroah-Hartman <gregkh@linuxfoundation.org>, Alim Akhtar <alim.akhtar@samsung.com>, Sylwester Nawrocki <s.nawrocki@samsung.com>, Chanwoo Choi <cw00.choi@samsung.com>, Michael Turquette <mturquette@baylibre.com>, Stephen Boyd <sboyd@kernel.org>, Thinh Nguyen <Thinh.Nguyen@synopsys.com>, =?utf-8?q?Andr=C3=A9_Draszik?= <andre.draszik@linaro.org>, Peter Griffin <peter.griffin@linaro.org>, Sam Protsenko <semen.protsenko@linaro.org>, David Virag <virag.david003@gmail.com>, Marek Szyprowski <m.szyprowski@samsung.com> Cc: linux-phy@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-usb@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-samsung-soc@vger.kernel.org, linux-clk@vger.kernel.org Subject: [PATCH 00/13] Add USB support to Exynos7885 Date: Sun, 4 Aug 2024 23:53:45 +0200 Message-ID: <20240804215458.404085-1-virag.david003@gmail.com> X-Mailer: git-send-email 2.46.0 Precedence: bulk X-Mailing-List: linux-samsung-soc@vger.kernel.org List-Id: <linux-samsung-soc.vger.kernel.org> List-Subscribe: <mailto:linux-samsung-soc+subscribe@vger.kernel.org> List-Unsubscribe: <mailto:linux-samsung-soc+unsubscribe@vger.kernel.org> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit |
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Add USB support to Exynos7885
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On 04/08/2024 23:53, David Virag wrote: > This set of patches adds support for USB on the Exynos7885 SoC. > > The Exynos7885 has a DWC3 compatible USB controller and an Exynos USB > PHY that theoretically supports USB3 SuperSpeed, but is not implemented > in any known device. The vendor kernel also stubs out USB3 functions, so > we do not support it. > > While at it, since we need some new clocks implemented, also fix some > issues with the existing clock driver/bindings. > > p.s.: Not realizing the USB PLL has a MUX on it made me waste I don't > even want to know how much time on troubleshooting why it's not > working... If there is going to be any new version, please split between subsystems into: clock+DTS, phy and usb. Best regards, Krzysztof