From patchwork Fri Mar 21 13:26:25 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Kim Kukjin X-Patchwork-Id: 3874141 Return-Path: X-Original-To: patchwork-linux-samsung-soc@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork2.web.kernel.org (Postfix) with ESMTP id 446A4BF540 for ; Fri, 21 Mar 2014 13:26:38 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id F12B12027D for ; Fri, 21 Mar 2014 13:26:36 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id AC57B20279 for ; Fri, 21 Mar 2014 13:26:34 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752394AbaCUN0d (ORCPT ); Fri, 21 Mar 2014 09:26:33 -0400 Received: from mailout1.samsung.com ([203.254.224.24]:42950 "EHLO mailout1.samsung.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751019AbaCUN0c (ORCPT ); Fri, 21 Mar 2014 09:26:32 -0400 Received: from epcpsbgr2.samsung.com (u142.gpu120.samsung.co.kr [203.254.230.142]) by mailout1.samsung.com (Oracle Communications Messaging Server 7u4-24.01 (7.0.4.24.0) 64bit (built Nov 17 2011)) with ESMTP id <0N2S004PFG060640@mailout1.samsung.com>; Fri, 21 Mar 2014 22:26:30 +0900 (KST) Received: from epcpsbgm1.samsung.com ( [203.254.230.47]) by epcpsbgr2.samsung.com (EPCPMTA) with SMTP id 59.30.09028.60E3C235; Fri, 21 Mar 2014 22:26:30 +0900 (KST) X-AuditID: cbfee68e-b7f566d000002344-31-532c3e060c00 Received: from epmmp2 ( [203.254.227.17]) by epcpsbgm1.samsung.com (EPCPMTA) with SMTP id F4.60.29263.60E3C235; Fri, 21 Mar 2014 22:26:30 +0900 (KST) Received: from DOKGENEKIM03 ([12.36.166.133]) by mmp2.samsung.com (Oracle Communications Messaging Server 7u4-24.01 (7.0.4.24.0) 64bit (built Nov 17 2011)) with ESMTPA id <0N2S00DC8G063J70@mmp2.samsung.com>; Fri, 21 Mar 2014 22:26:30 +0900 (KST) From: Kukjin Kim To: linux-arm-kernel@lists.infradead.org, linux-samsung-soc@vger.kernel.org, devicetree@vger.kernel.org Cc: 'Thomas Abraham' , mark.rutland@arm.com, 'Catalin Marinas' , ilho215.lee@samsung.com Subject: [PATCH v4 1/3] arm64: dts: add initial dts for Samsung GH7 SoC and SSDK-GH7 board Date: Fri, 21 Mar 2014 22:26:25 +0900 Message-id: <000301cf4509$2b6400b0$822c0210$@samsung.com> MIME-version: 1.0 Content-type: text/plain; charset=us-ascii Content-transfer-encoding: 7bit X-Mailer: Microsoft Outlook 14.0 Thread-index: Ac9FCSiJVc+K4w5eTJ6d5vio5Bg8oA== Content-language: ko X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFjrJIsWRmVeSWpSXmKPExsVy+t8zfV02O51gg6blshbvl/UwWsw/co7V 4ui/hYwWvQuusllsenyN1WLG+X1MFkuvX2Sy6FjG6MDhsWbeGkaPzUvqPfq2rGL0+LxJLoAl issmJTUnsyy1SN8ugSvj1am5LAUTNSru9rcyNTDekuti5OSQEDCR2PPgBBuELSZx4d56MFtI YBmjxK/XpTA1J/e8Zexi5AKKT2eUOHF5MyuE85dR4ub1A6wgVWwCGhKH3z9jB7FFBDIlNt3d BtbBLNDFKNF/+BRYkbBAjMTUbUfBbBYBVYnn57cxg9i8ApYSJ5t2sULYghI/Jt9jAbGZBbQk 1u88zgRhy0tsXvOWGeIkBYkdZ18zQizTk7i6cz8rRI2IxL4X78AWSwhcYpeY930KE8QyAYlv kw8BDeUASshKbDoANUdS4uCKGywTGMVmIVk9C8nqWUhWz0KyYgEjyypG0dSC5ILipPQiI73i xNzi0rx0veT83E2MkGjs28F484D1IcZkoPUTmaVEk/OB0ZxXEm9obGZkYWpiamxkbmlGmrCS OO+ih0lBQgLpiSWp2ampBalF8UWlOanFhxiZODilGhj1WT8d9H01OXam4GSh1kP1u3pMfCO0 r6yrKlgnz7lmkvm6P2GiaTOcn5r/ttv/Z+48wZQVj7KnPKmx/H5hb1JehFkIz+YbmwOqw/V4 o6bECX5NP7K62ullgLX8HMli5+4A5lNHTpcYLL9U84VdSpc7QdFh4nJxr4tbO2OeSuTNCE7P tnng0KvEUpyRaKjFXFScCAA7hFh63AIAAA== X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFlrOKsWRmVeSWpSXmKPExsVy+t9jQV02O51ggy2rJCzeL+thtJh/5Byr xdF/CxktehdcZbPY9Pgaq8WM8/uYLJZev8hk0bGM0YHDY828NYwem5fUe/RtWcXo8XmTXABL VAOjTUZqYkpqkUJqXnJ+SmZeuq2Sd3C8c7ypmYGhrqGlhbmSQl5ibqqtkotPgK5bZg7QFUoK ZYk5pUChgMTiYiV9O0wTQkPcdC1gGiN0fUOC4HqMDNBAwjrGjFen5rIUTNSouNvfytTAeEuu i5GTQ0LAROLknreMELaYxIV769m6GLk4hASmM0qcuLyZFcL5yyhx8/oBVpAqNgENicPvn7GD 2CICmRKb7m5jBCliFuhilOg/fAqsSFggRmLqtqNgNouAqsTz89uYQWxeAUuJk027WCFsQYkf k++xgNjMAloS63ceZ4Kw5SU2r3nLDHGSgsSOs68ZIZbpSVzduZ8VokZEYt+Ld4wTGAVmIRk1 C8moWUhGzULSsoCRZRWjaGpBckFxUnquoV5xYm5xaV66XnJ+7iZGcLQ/k9rBuLLB4hCjAAej Eg9vBad2sBBrYllxZe4hRgkOZiURXjYLnWAh3pTEyqrUovz4otKc1OJDjMlAn05klhJNzgcm orySeENjEzMjSyMzCyMTc3PShJXEeQ+0WgcKCaQnlqRmp6YWpBbBbGHi4JRqYFwhwpuSaZH4 4+6GfH6fVzceHdYL+ThDyHr5wwnRrS6ZR7St+9s9lh23O/mE+9KSL7PsbkoUxQuaeWx6c4Hz S+fWR7XdJlbhF9YEipdkLzr9bmHFpapEl6kOr6cpvZiwtWY36/wj6Q9v3BPRf9Ww3LL9XONl r+NxT4rc+yz3KPUuVCy/rPTc00KJpTgj0VCLuag4EQC6dQHEOgMAAA== DLP-Filter: Pass X-MTR: 20000000000000000@CPGS X-CFilter-Loop: Reflected Sender: linux-samsung-soc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-samsung-soc@vger.kernel.org X-Spam-Status: No, score=-6.9 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_HI, T_RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Signed-off-by: Kukjin Kim Reviewed-by: Thomas Abraham Cc: Mark Rutland Cc: Catalin Marinas --- Changes since v3: - addressed comments from Mark : updated reserved memory : fixed interrupt trigger for pmu and serial - removing 'gh7-pmu' from PMU compatible string Since the patch 2nd and 3rd are same with previous version I'm not re-posting. arch/arm64/boot/dts/samsung-gh7.dtsi | 134 ++++++++++++++++++++++++++++++ arch/arm64/boot/dts/samsung-ssdk-gh7.dts | 26 ++++++ 2 files changed, 160 insertions(+) create mode 100644 arch/arm64/boot/dts/samsung-gh7.dtsi create mode 100644 arch/arm64/boot/dts/samsung-ssdk-gh7.dts diff --git a/arch/arm64/boot/dts/samsung-gh7.dtsi b/arch/arm64/boot/dts/samsung-gh7.dtsi new file mode 100644 index 0000000..d3ab914 --- /dev/null +++ b/arch/arm64/boot/dts/samsung-gh7.dtsi @@ -0,0 +1,134 @@ +/* + * SAMSUNG GH7 SoC device tree source + * + * Copyright (c) 2014 Samsung Electronics Co., Ltd. + * http://www.samsung.com + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. +*/ + +/memreserve/ 0x80000000 0x00010000; + +/ { + interrupt-parent = <&gic>; + #address-cells = <2>; + #size-cells = <2>; + + aliases { + serial0 = "/amba/uart@12c00000"; + }; + + cpus { + #address-cells = <2>; + #size-cells = <0>; + + cpu@000 { + device_type = "cpu"; + compatible = "arm,armv8"; + reg = <0x0 0x000>; + enable-method = "spin-table"; + cpu-release-addr = <0x0 0x8000fff8>; + }; + cpu@001 { + device_type = "cpu"; + compatible = "arm,armv8"; + reg = <0x0 0x001>; + enable-method = "spin-table"; + cpu-release-addr = <0x0 0x8000fff8>; + }; + cpu@002 { + device_type = "cpu"; + compatible = "arm,armv8"; + reg = <0x0 0x002>; + enable-method = "spin-table"; + cpu-release-addr = <0x0 0x8000fff8>; + }; + cpu@003 { + device_type = "cpu"; + compatible = "arm,armv8"; + reg = <0x0 0x003>; + enable-method = "spin-table"; + cpu-release-addr = <0x0 0x8000fff8>; + }; + cpu@100 { + device_type = "cpu"; + compatible = "arm,armv8"; + reg = <0x0 0x100>; + enable-method = "spin-table"; + cpu-release-addr = <0x0 0x8000fff8>; + }; + cpu@101 { + device_type = "cpu"; + compatible = "arm,armv8"; + reg = <0x0 0x101>; + enable-method = "spin-table"; + cpu-release-addr = <0x0 0x8000fff8>; + }; + cpu@102 { + device_type = "cpu"; + compatible = "arm,armv8"; + reg = <0x0 0x102>; + enable-method = "spin-table"; + cpu-release-addr = <0x0 0x8000fff8>; + }; + cpu@103 { + device_type = "cpu"; + compatible = "arm,armv8"; + reg = <0x0 0x103>; + enable-method = "spin-table"; + cpu-release-addr = <0x0 0x8000fff8>; + }; + }; + + gic: interrupt-controller@1C000000 { + compatible = "arm,cortex-a15-gic"; + #interrupt-cells = <3>; + interrupt-controller; + reg = <0x0 0x1C001000 0 0x1000>, /* GIC Dist */ + <0x0 0x1C002000 0 0x1000>, /* GIC CPU */ + <0x0 0x1C004000 0 0x2000>, /* GIC VCPU Control */ + <0x0 0x1C006000 0 0x2000>; /* GIC VCPU */ + interrupts = <1 9 0xf04>; /* GIC Maintenence IRQ */ + }; + + timer { + compatible = "arm,armv8-timer"; + interrupts = <1 13 0xff01>, /* Secure Phys IRQ */ + <1 14 0xff01>, /* Non-secure Phys IRQ */ + <1 11 0xff01>, /* Virt IRQ */ + <1 10 0xff01>; /* Hyp IRQ */ + }; + + pmu { + compatible = "armv8-pmuv3"; + interrupts = <0 294 8>, + <0 295 8>, + <0 296 8>, + <0 297 8>, + <0 298 8>, + <0 299 8>, + <0 300 8>, + <0 301 8>; + }; + + amba { + compatible = "arm,amba-bus"; + #address-cells = <2>; + #size-cells = <2>; + ranges; + + serial@12c00000 { + compatible = "arm,pl011", "arm,primecell"; + reg = <0 0x12c00000 0 0x10000>; + interrupts = <0 418 4>; + }; + + serial@12c20000 { + compatible = "arm,pl011", "arm,primecell"; + reg = <0 0x12c20000 0 0x10000>; + interrupts = <0 420 4>; + }; + }; +}; diff --git a/arch/arm64/boot/dts/samsung-ssdk-gh7.dts b/arch/arm64/boot/dts/samsung-ssdk-gh7.dts new file mode 100644 index 0000000..80bd93c --- /dev/null +++ b/arch/arm64/boot/dts/samsung-ssdk-gh7.dts @@ -0,0 +1,26 @@ +/* + * SAMSUNG SSDK-GH7 board device tree source + * + * Copyright (c) 2014 Samsung Electronics Co., Ltd. + * http://www.samsung.com + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. +*/ + +/dts-v1/; +#include "samsung-gh7.dtsi" + +/ { + model = "samsung,SSDK-GH7"; + compatible = "samsung,ssdk-gh7", "samsung,gh7"; + + chosen { + }; + + memory@80000000 { + device_type = "memory"; + reg = <0x00000000 0x80000000 0 0x80000000>; + }; +};