From patchwork Tue Jul 2 08:40:31 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jingoo Han X-Patchwork-Id: 2811061 Return-Path: X-Original-To: patchwork-linux-samsung-soc@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork1.web.kernel.org (Postfix) with ESMTP id D34319F755 for ; Tue, 2 Jul 2013 08:40:58 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 8936520143 for ; Tue, 2 Jul 2013 08:40:57 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 1BB6A20142 for ; Tue, 2 Jul 2013 08:40:56 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S932141Ab3GBIkv (ORCPT ); Tue, 2 Jul 2013 04:40:51 -0400 Received: from mailout4.samsung.com ([203.254.224.34]:42670 "EHLO mailout4.samsung.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753236Ab3GBIkr (ORCPT ); Tue, 2 Jul 2013 04:40:47 -0400 Received: from epcpsbgr4.samsung.com (u144.gpu120.samsung.co.kr [203.254.230.144]) by mailout4.samsung.com (Oracle Communications Messaging Server 7u4-24.01 (7.0.4.24.0) 64bit (built Nov 17 2011)) with ESMTP id <0MPA00270W3JZZU0@mailout4.samsung.com>; Tue, 02 Jul 2013 17:40:31 +0900 (KST) Received: from epcpsbgm2.samsung.com ( [203.254.230.48]) by epcpsbgr4.samsung.com (EPCPMTA) with SMTP id 39.AF.29708.FF192D15; Tue, 02 Jul 2013 17:40:31 +0900 (KST) X-AuditID: cbfee690-b7f6f6d00000740c-68-51d291ff4264 Received: from epmmp1.local.host ( [203.254.227.16]) by epcpsbgm2.samsung.com (EPCPMTA) with SMTP id 72.0F.21068.FF192D15; Tue, 02 Jul 2013 17:40:31 +0900 (KST) Received: from DOJG1HAN03 ([12.23.120.99]) by mmp1.samsung.com (Oracle Communications Messaging Server 7u4-24.01 (7.0.4.24.0) 64bit (built Nov 17 2011)) with ESMTPA id <0MPA007FGW3JNS60@mmp1.samsung.com>; Tue, 02 Jul 2013 17:40:31 +0900 (KST) From: Jingoo Han To: linux-arm-kernel@lists.infradead.org, linux-samsung-soc@vger.kernel.org Cc: 'Kishon Vijay Abraham I' , linux-media@vger.kernel.org, 'Kukjin Kim' , 'Sylwester Nawrocki' , 'Felipe Balbi' , 'Tomasz Figa' , devicetree-discuss@lists.ozlabs.org, 'Inki Dae' , 'Donghwa Lee' , 'Kyungmin Park' , 'Jean-Christophe PLAGNIOL-VILLARD' , 'Tomi Valkeinen' , linux-fbdev@vger.kernel.org, 'Hui Wang' , Jingoo Han Subject: [PATCH V4 2/4] phy: Add driver for Exynos DP PHY Date: Tue, 02 Jul 2013 17:40:31 +0900 Message-id: <000b01ce76ff$cf9fd6a0$6edf83e0$@samsung.com> MIME-version: 1.0 Content-type: text/plain; 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Signed-off-by: Jingoo Han Cc: Sylwester Nawrocki Acked-by: Felipe Balbi Reviewed-by: Tomasz Figa --- .../devicetree/bindings/phy/samsung-phy.txt | 8 ++ drivers/phy/Kconfig | 6 ++ drivers/phy/Makefile | 1 + drivers/phy/phy-exynos-dp-video.c | 111 ++++++++++++++++++++ 4 files changed, 126 insertions(+) create mode 100644 drivers/phy/phy-exynos-dp-video.c diff --git a/Documentation/devicetree/bindings/phy/samsung-phy.txt b/Documentation/devicetree/bindings/phy/samsung-phy.txt index 5ff208c..c0fccaa 100644 --- a/Documentation/devicetree/bindings/phy/samsung-phy.txt +++ b/Documentation/devicetree/bindings/phy/samsung-phy.txt @@ -12,3 +12,11 @@ the PHY specifier identifies the PHY and its meaning is as follows: 1 - MIPI DSIM 0, 2 - MIPI CSIS 1, 3 - MIPI DSIM 1. + +Samsung EXYNOS SoC series Display Port PHY +------------------------------------------------- + +Required properties: +- compatible : should be "samsung,exynos5250-dp-video-phy"; +- reg : offset and length of the Display Port PHY register set; +- #phy-cells : from the generic PHY bindings, must be 0; diff --git a/drivers/phy/Kconfig b/drivers/phy/Kconfig index 6f446d0..ed0b1b8 100644 --- a/drivers/phy/Kconfig +++ b/drivers/phy/Kconfig @@ -19,4 +19,10 @@ config PHY_EXYNOS_MIPI_VIDEO help Support for MIPI CSI-2 and MIPI DSI DPHY found on Samsung S5P and EXYNOS SoCs. + +config PHY_EXYNOS_DP_VIDEO + tristate "EXYNOS SoC series Display Port PHY driver" + depends on OF + help + Support for Display Port PHY found on Samsung EXYNOS SoCs. endif diff --git a/drivers/phy/Makefile b/drivers/phy/Makefile index 71d8841..0fd1340 100644 --- a/drivers/phy/Makefile +++ b/drivers/phy/Makefile @@ -4,3 +4,4 @@ obj-$(CONFIG_GENERIC_PHY) += phy-core.o obj-$(CONFIG_PHY_EXYNOS_MIPI_VIDEO) += phy-exynos-mipi-video.o +obj-$(CONFIG_PHY_EXYNOS_DP_VIDEO) += phy-exynos-dp-video.o diff --git a/drivers/phy/phy-exynos-dp-video.c b/drivers/phy/phy-exynos-dp-video.c new file mode 100644 index 0000000..3c8e247 --- /dev/null +++ b/drivers/phy/phy-exynos-dp-video.c @@ -0,0 +1,111 @@ +/* + * Samsung EXYNOS SoC series Display Port PHY driver + * + * Copyright (C) 2013 Samsung Electronics Co., Ltd. + * Author: Jingoo Han + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +#include +#include +#include +#include +#include +#include +#include + +/* DPTX_PHY_CONTROL register */ +#define EXYNOS_DPTX_PHY_ENABLE (1 << 0) + +struct exynos_dp_video_phy { + void __iomem *regs; +}; + +static int __set_phy_state(struct exynos_dp_video_phy *state, unsigned int on) +{ + u32 reg; + + reg = readl(state->regs); + if (on) + reg |= EXYNOS_DPTX_PHY_ENABLE; + else + reg &= ~EXYNOS_DPTX_PHY_ENABLE; + writel(reg, state->regs); + + return 0; +} + +static int exynos_dp_video_phy_power_on(struct phy *phy) +{ + struct exynos_dp_video_phy *state = phy_get_drvdata(phy); + + return __set_phy_state(state, 1); +} + +static int exynos_dp_video_phy_power_off(struct phy *phy) +{ + struct exynos_dp_video_phy *state = phy_get_drvdata(phy); + + return __set_phy_state(state, 0); +} + +static struct phy_ops exynos_dp_video_phy_ops = { + .power_on = exynos_dp_video_phy_power_on, + .power_off = exynos_dp_video_phy_power_off, + .owner = THIS_MODULE, +}; + +static int exynos_dp_video_phy_probe(struct platform_device *pdev) +{ + struct exynos_dp_video_phy *state; + struct device *dev = &pdev->dev; + struct resource *res; + struct phy_provider *phy_provider; + struct phy *phy; + + state = devm_kzalloc(dev, sizeof(*state), GFP_KERNEL); + if (!state) + return -ENOMEM; + + res = platform_get_resource(pdev, IORESOURCE_MEM, 0); + + state->regs = devm_ioremap_resource(dev, res); + if (IS_ERR(state->regs)) + return PTR_ERR(state->regs); + + phy_provider = devm_of_phy_provider_register(dev, of_phy_simple_xlate); + if (IS_ERR(phy_provider)) + return PTR_ERR(phy_provider); + + phy = devm_phy_create(dev, 0, &exynos_dp_video_phy_ops, NULL); + if (IS_ERR(phy)) { + dev_err(dev, "failed to create Display Port PHY\n"); + return PTR_ERR(phy); + } + phy_set_drvdata(phy, state); + + return 0; +} + +static const struct of_device_id exynos_dp_video_phy_of_match[] = { + { .compatible = "samsung,exynos5250-dp-video-phy" }, + { }, +}; +MODULE_DEVICE_TABLE(of, exynos_dp_video_phy_of_match); + +static struct platform_driver exynos_dp_video_phy_driver = { + .probe = exynos_dp_video_phy_probe, + .driver = { + .name = "exynos-dp-video-phy", + .owner = THIS_MODULE, + .of_match_table = exynos_dp_video_phy_of_match, + } +}; +module_platform_driver(exynos_dp_video_phy_driver); + +MODULE_AUTHOR("Jingoo Han "); +MODULE_DESCRIPTION("Samsung EXYNOS SoC DP PHY driver"); +MODULE_LICENSE("GPL v2");