From patchwork Fri Nov 6 10:03:46 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Pavel Fedin X-Patchwork-Id: 7567941 Return-Path: X-Original-To: patchwork-linux-samsung-soc@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork2.web.kernel.org (Postfix) with ESMTP id 1BF7DC05C6 for ; Fri, 6 Nov 2015 10:08:50 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 299A220762 for ; Fri, 6 Nov 2015 10:08:49 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 2B8CC20722 for ; Fri, 6 Nov 2015 10:08:48 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1161222AbbKFKFO (ORCPT ); Fri, 6 Nov 2015 05:05:14 -0500 Received: from mailout1.w1.samsung.com ([210.118.77.11]:41738 "EHLO mailout1.w1.samsung.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1161114AbbKFKD6 (ORCPT ); Fri, 6 Nov 2015 05:03:58 -0500 Received: from eucpsbgm2.samsung.com (unknown [203.254.199.245]) by mailout1.w1.samsung.com (Oracle Communications Messaging Server 7.0.5.31.0 64bit (built May 5 2014)) with ESMTP id <0NXE003EY1AIIS70@mailout1.w1.samsung.com>; Fri, 06 Nov 2015 10:03:55 +0000 (GMT) X-AuditID: cbfec7f5-f794b6d000001495-4b-563c7b0a6654 Received: from eusync2.samsung.com ( [203.254.199.212]) by eucpsbgm2.samsung.com (EUCPMTA) with SMTP id 0B.0B.05269.A0B7C365; Fri, 6 Nov 2015 10:03:54 +0000 (GMT) Received: from fedinw7x64.rnd.samsung.ru ([106.109.131.169]) by eusync2.samsung.com (Oracle Communications Messaging Server 7.0.5.31.0 64bit (built May 5 2014)) with ESMTPA id <0NXE004JA1ADOZ00@eusync2.samsung.com>; Fri, 06 Nov 2015 10:03:54 +0000 (GMT) From: Pavel Fedin To: devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-samsung-soc@vger.kernel.org, linux-kernel@vger.kernel.org Cc: Rob Herring , Pawel Moll , Mark Rutland , Ian Campbell , Kumar Gala , Kukjin Kim , Krzysztof Kozlowski Subject: [PATCH v7 1/4] Documentation: dt-bindings: Describe SROMc configuration Date: Fri, 06 Nov 2015 13:03:46 +0300 Message-id: <0bc58ce0fd39767834f486c4c0cfbbd70044caed.1446799912.git.p.fedin@samsung.com> X-Mailer: git-send-email 2.4.4 In-reply-to: References: In-reply-to: References: X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFjrJLMWRmVeSWpSXmKPExsVy+t/xK7pc1TZhBjvfmVjMP3KO1aL/zUJW i3OvVjJavH5haNH/+DWzxabH11gtLu+aw2Yx4/w+Joul1y8yWUyYvpbFonXvEXYHbo8189Yw elzu62XyWLn8C5vHplWdbB6bl9R79G1ZxejxeZNcAHsUl01Kak5mWWqRvl0CV0bH3A2MBe9l KvrvPmNuYDwq2sXIwSEhYCJxb1ltFyMnkCkmceHeerYuRi4OIYGljBKnWuczQzhtTBJXNx1g BaliE1CXOP31AwtIQkSgnVHiWONGJhCHWWAik8SS6fsZQaqEBQIk9mzvAutgEVCVWP36HZjN KxAtMbvxCzPEPjmJK9ens4HYnALmEpe27mcHsYUEzCTWdt5gwSU+gZF/ASPDKkbR1NLkguKk 9FwjveLE3OLSvHS95PzcTYyQAP66g3HpMatDjAIcjEo8vAbLrcOEWBPLiitzDzFKcDArifDK MduECfGmJFZWpRblxxeV5qQWH2KU5mBREueduet9iJBAemJJanZqakFqEUyWiYNTqoFR+KiH /PLFQq5i3tdN/x1oCfm+X/OYielve6/6trStn/aUdfxaYBD7pbR5p8RWSQ4RoW5V8281vLxa xv8Om7akvPiVbN28+XGeatSzOTW2fzO29x14wRllWusY8N0jKIp9kt1Cs4OSnv59N3cfuKJw 4lnHyhVbnoca/L8gO+lj/Oli/ZbEzxOUWIozEg21mIuKEwE5NyZCXAIAAA== Sender: linux-samsung-soc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-samsung-soc@vger.kernel.org X-Spam-Status: No, score=-6.9 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_HI, T_RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Add documentation for new subnode properties, allowing bank configuration. Based on u-boot implementation, but heavily reworked. Also, fix size of SROMc mapping in the example. Signed-off-by: Pavel Fedin Reviewed-by: Krzysztof Kozlowski --- .../bindings/arm/samsung/exynos-srom.txt | 71 +++++++++++++++++++++- 1 file changed, 69 insertions(+), 2 deletions(-) diff --git a/Documentation/devicetree/bindings/arm/samsung/exynos-srom.txt b/Documentation/devicetree/bindings/arm/samsung/exynos-srom.txt index 33886d5..3ff2950 100644 --- a/Documentation/devicetree/bindings/arm/samsung/exynos-srom.txt +++ b/Documentation/devicetree/bindings/arm/samsung/exynos-srom.txt @@ -5,8 +5,75 @@ Required properties: - reg: offset and length of the register set -Example: +Optional properties: +The SROM controller can be used to attach external peripherals. In this case +extra properties, describing the bus behind it, should be specified as below: + +- #address-cells: Must be set to 2 to allow memory address translation + +- #size-cells: Must be set to 1 to allow CS address passing + +- ranges: Must be set up to reflect the memory layout with four integer values + per bank: + 0 + +Sub-nodes: +The actual device nodes should be added as subnodes to the SROMc node. These +subnodes, except regular device specification, should contain the following +properties, describing configuration of the relevant SROM bank: + +Required properties: +- reg: bank number, base address (relative to start of the bank) and size of + the memory mapped for the device. Note that base address will be + typically 0 as this is the start of the bank. + +- samsung,srom-timing : array of 6 integers, specifying bank timings in the + following order: Tacp, Tcah, Tcoh, Tacc, Tcos, Tacs. + Each value is specified in cycles and has the following + meaning and valid range: + Tacp : Page mode access cycle at Page mode (0 - 15) + Tcah : Address holding time after CSn (0 - 15) + Tcoh : Chip selection hold on OEn (0 - 15) + Tacc : Access cycle (0 - 31, the actual time is N + 1) + Tcos : Chip selection set-up before OEn (0 - 15) + Tacs : Address set-up before CSn (0 - 15) + +Optional properties: +- reg-io-width : data width in bytes (1 or 2). If omitted, default of 1 is used. + +- samsung,srom-page-mode : page mode configuration for the bank: + 0 - normal (one data) + 1 - four data + If omitted, default of 0 is used. + +Example: basic definition, no banks are configured + sromc@12570000 { + compatible = "samsung,exynos-srom"; + reg = <0x12570000 0x14>; + }; + +Example: SROMc with SMSC911x ethernet chip on bank 3 sromc@12570000 { + #address-cells = <2>; + #size-cells = <1>; + ranges = <0 0 0x04000000 0x20000 // Bank0 + 1 0 0x05000000 0x20000 // Bank1 + 2 0 0x06000000 0x20000 // Bank2 + 3 0 0x07000000 0x20000>; // Bank3 + compatible = "samsung,exynos-srom"; - reg = <0x12570000 0x10>; + reg = <0x12570000 0x14>; + + ethernet@3 { + compatible = "smsc,lan9115"; + reg = <3 0 0x10000>; // Bank 3, offset = 0 + phy-mode = "mii"; + interrupt-parent = <&gpx0>; + interrupts = <5 8>; + reg-io-width = <2>; + smsc,irq-push-pull; + smsc,force-internal-phy; + + samsung,srom-config = <1 9 12 1 9 1 1>; + }; };