| Message ID | 1363222742-15220-2-git-send-email-agraf@suse.de (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
diff --git a/arch/arm/boot/dts/exynos5250.dtsi b/arch/arm/boot/dts/exynos5250.dtsi index b1ac73e..768cb42 100644 --- a/arch/arm/boot/dts/exynos5250.dtsi +++ b/arch/arm/boot/dts/exynos5250.dtsi @@ -47,10 +47,14 @@ }; gic:interrupt-controller@10481000 { - compatible = "arm,cortex-a9-gic"; + compatible = "arm,cortex-a15-gic", "arm,cortex-a9-gic"; #interrupt-cells = <3>; interrupt-controller; - reg = <0x10481000 0x1000>, <0x10482000 0x2000>; + reg = <0x10481000 0x1000>, + <0x10482000 0x1000>, + <0x10484000 0x2000>, + <0x10486000 0x2000>; + interrupts = <1 9 0xf04>; }; combiner:interrupt-controller@10440000 {
The GIC in the exynos5250 SoC is A15 compliant. Show this through the device tree, so that we can use the GIC for KVM. Also add the respective A15 memory regions and interrupt links. Signed-off-by: Alexander Graf <agraf@suse.de> --- arch/arm/boot/dts/exynos5250.dtsi | 8 ++++++-- 1 file changed, 6 insertions(+), 2 deletions(-)