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[5/6] pinctrl: samsung: Handle banks with two configuration registers

Message ID 1363642315-10331-6-git-send-email-tomasz.figa@gmail.com (mailing list archive)
State New, archived
Headers show

Commit Message

Tomasz Figa March 18, 2013, 9:31 p.m. UTC
This patch adds support for banks that have more than one function
configuration registers, e.g. some of the banks of S3C64xx SoCs.

Signed-off-by: Tomasz Figa <tomasz.figa@gmail.com>
---
 drivers/pinctrl/pinctrl-samsung.c | 10 ++++++++++
 1 file changed, 10 insertions(+)

Comments

Linus Walleij April 9, 2013, 7:44 a.m. UTC | #1
On Mon, Mar 18, 2013 at 10:31 PM, Tomasz Figa <tomasz.figa@gmail.com> wrote:

> This patch adds support for banks that have more than one function
> configuration registers, e.g. some of the banks of S3C64xx SoCs.
>
> Signed-off-by: Tomasz Figa <tomasz.figa@gmail.com>

Patch applied.

Yours,
Linus Walleij
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diff mbox

Patch

diff --git a/drivers/pinctrl/pinctrl-samsung.c b/drivers/pinctrl/pinctrl-samsung.c
index 45a9939..b738b7b 100644
--- a/drivers/pinctrl/pinctrl-samsung.c
+++ b/drivers/pinctrl/pinctrl-samsung.c
@@ -303,6 +303,11 @@  static void samsung_pinmux_setup(struct pinctrl_dev *pctldev, unsigned selector,
 		type = bank->type;
 		mask = (1 << type->fld_width[PINCFG_TYPE_FUNC]) - 1;
 		shift = pin_offset * type->fld_width[PINCFG_TYPE_FUNC];
+		if (shift >= 32) {
+			/* Some banks have two config registers */
+			shift -= 32;
+			reg += 4;
+		}
 
 		spin_lock_irqsave(&bank->slock, flags);
 
@@ -356,6 +361,11 @@  static int samsung_pinmux_gpio_set_direction(struct pinctrl_dev *pctldev,
 
 	mask = (1 << type->fld_width[PINCFG_TYPE_FUNC]) - 1;
 	shift = pin_offset * type->fld_width[PINCFG_TYPE_FUNC];
+	if (shift >= 32) {
+		/* Some banks have two config registers */
+		shift -= 32;
+		reg += 4;
+	}
 
 	spin_lock_irqsave(&bank->slock, flags);