From patchwork Wed Apr 10 10:30:20 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Yuvaraj CD X-Patchwork-Id: 2420351 Return-Path: X-Original-To: patchwork-linux-samsung-soc@patchwork.kernel.org Delivered-To: patchwork-process-083081@patchwork1.kernel.org Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by patchwork1.kernel.org (Postfix) with ESMTP id 2BB653FD8C for ; Wed, 10 Apr 2013 10:30:40 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S936827Ab3DJKaj (ORCPT ); Wed, 10 Apr 2013 06:30:39 -0400 Received: from mail-pb0-f48.google.com ([209.85.160.48]:39041 "EHLO mail-pb0-f48.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S936239Ab3DJKai (ORCPT ); Wed, 10 Apr 2013 06:30:38 -0400 Received: by mail-pb0-f48.google.com with SMTP id xb4so191175pbc.7 for ; Wed, 10 Apr 2013 03:30:38 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=x-received:from:to:cc:subject:date:message-id:x-mailer; bh=6xlNzNHbshVcOEpwF7FRV6d0VZYC1YjMaWCAjrHd1W8=; b=lO+lHfjhzNcBbaHshS8Fwmx+7lY8y7ffNbYBkfGSJ2kzFNaWqeftfuQOT2e0HrQ44j nYAz5Txdxkbd6M5kjmaN4PQdWHZ3H8nX2LNxgxpZxoz1vrr2Q12p88k3atZpamOBj2BY nEp7skRaVpF1jgid/OZkEJ7H1YJLzjkH1IWjGEgLa1bCjivwybSEr0hvnhIckpAy/e0o R+a+D4aAJvRk+4mN5sboSEwlH+jwgTev2cuAo27b4WlalDXl3ur0gZDzbLAzo4QJXeK+ W2Plt9ALGw6sGPdfkN6RiCCtqr2n5ymPmlm9Ou1+b1ZKn37wkNv/d0YYUW/G1UhJ5v8B ouag== X-Received: by 10.67.2.68 with SMTP id bm4mr2782141pad.9.1365589837976; Wed, 10 Apr 2013 03:30:37 -0700 (PDT) Received: from yuvaraj-ubuntu.sisodomain.com ([115.113.119.130]) by mx.google.com with ESMTPS id jw10sm5992838pbb.3.2013.04.10.03.30.34 (version=TLSv1 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Wed, 10 Apr 2013 03:30:36 -0700 (PDT) From: Yuvaraj Kumar C D To: linux-i2c@vger.kernel.org, linux-samsung-soc@vger.kernel.org, linux-arm-kernel@lists.infradead.org, wsa@the-dreams.de, ch.naveen@samsung.com, taeggyun.ko@samsung.com Cc: Yuvaraj Kumar C D Subject: [PATCH] I2C: EXYNOS5: Set up the TX FIFO and RX FIFO for HSI2C Date: Wed, 10 Apr 2013 16:00:20 +0530 Message-Id: <1365589820-28440-1-git-send-email-yuvaraj.cd@samsung.com> X-Mailer: git-send-email 1.7.9.5 Sender: linux-samsung-soc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-samsung-soc@vger.kernel.org This patch, set up TX FIFO and RX FIFO of HSI2C controller based on i2c message length.If we configure TX and RX FIFO for a default value,the ALMOST_EMPTY and ALMOST_FULL will rise the interrupts unnecessary. Signed-off-by: Yuvaraj Kumar C D --- drivers/i2c/busses/i2c-exynos5.c | 21 ++++++++++++--------- 1 file changed, 12 insertions(+), 9 deletions(-) diff --git a/drivers/i2c/busses/i2c-exynos5.c b/drivers/i2c/busses/i2c-exynos5.c index a38c616..b25c717 100644 --- a/drivers/i2c/busses/i2c-exynos5.c +++ b/drivers/i2c/busses/i2c-exynos5.c @@ -77,9 +77,9 @@ /* I2C_FIFO_CTL Register bits */ #define HSI2C_RXFIFO_EN (1u << 0) #define HSI2C_TXFIFO_EN (1u << 1) -#define HSI2C_TXFIFO_TRIGGER_LEVEL (0x30 << 16) -#define HSI2C_RXFIFO_TRIGGER_LEVEL (0x30 << 4) - +#define HSI2C_FIFO_MAX (0x40) +#define HSI2C_RXFIFO_TRIGGER_LEVEL(x) ((x) << 4) +#define HSI2C_TXFIFO_TRIGGER_LEVEL(x) ((x) << 16) /* I2C_TRAILING_CTL Register bits */ #define HSI2C_TRAILING_COUNT (0xf) @@ -400,10 +400,9 @@ static irqreturn_t exynos5_i2c_irq(int irqno, void *dev_id) goto stop; } - /* 0x30 is the default trigger level for TX FIFO */ - len = 48 - fifo_level; - - if (len > i2c->msg->len) + if (i2c->msg->len > HSI2C_FIFO_MAX) + len = HSI2C_FIFO_MAX; + else len = i2c->msg->len; i2c->msg_len += len; @@ -492,10 +491,11 @@ static void exynos5_i2c_message_start(struct exynos5_i2c *i2c, int stop) u32 i2c_auto_conf = 0; u32 fifo_ctl; + unsigned short len = (i2c->msg->len > HSI2C_FIFO_MAX) ? + HSI2C_FIFO_MAX : i2c->msg->len; exynos5_i2c_en_timeout(i2c); - fifo_ctl = HSI2C_RXFIFO_EN | HSI2C_TXFIFO_EN | - HSI2C_TXFIFO_TRIGGER_LEVEL | HSI2C_RXFIFO_TRIGGER_LEVEL; + fifo_ctl = HSI2C_RXFIFO_EN | HSI2C_TXFIFO_EN; writel(fifo_ctl, i2c->regs + HSI2C_FIFO_CTL); i2c_ctl = readl(i2c->regs + HSI2C_CTL); @@ -506,11 +506,13 @@ static void exynos5_i2c_message_start(struct exynos5_i2c *i2c, int stop) i2c_auto_conf |= HSI2C_READ_WRITE; + fifo_ctl |= HSI2C_RXFIFO_TRIGGER_LEVEL(len); int_en |= (HSI2C_INT_RX_ALMOSTFULL_EN | HSI2C_INT_TRAILING_EN); } else { i2c_ctl |= HSI2C_TXCHON; + fifo_ctl |= HSI2C_TXFIFO_TRIGGER_LEVEL(len); int_en |= HSI2C_INT_TX_ALMOSTEMPTY_EN; } @@ -519,6 +521,7 @@ static void exynos5_i2c_message_start(struct exynos5_i2c *i2c, int stop) writel(HSI2C_SLV_ADDR_MAS(i2c->msg->addr), i2c->regs + HSI2C_ADDR); + writel(fifo_ctl, i2c->regs + HSI2C_FIFO_CTL); writel(i2c_ctl, i2c->regs + HSI2C_CTL); /* In auto mode the length of xfer cannot be 0 */