From patchwork Fri May 10 16:38:09 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Sylwester Nawrocki/Kernel \\(PLT\\) /SRPOL/Staff Engineer/Samsung Electronics" X-Patchwork-Id: 2551751 Return-Path: X-Original-To: patchwork-linux-samsung-soc@patchwork.kernel.org Delivered-To: patchwork-process-083081@patchwork1.kernel.org Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by patchwork1.kernel.org (Postfix) with ESMTP id EDC703FD85 for ; Fri, 10 May 2013 16:38:37 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1755655Ab3EJQih (ORCPT ); Fri, 10 May 2013 12:38:37 -0400 Received: from mailout3.samsung.com ([203.254.224.33]:64355 "EHLO mailout3.samsung.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1754157Ab3EJQig (ORCPT ); Fri, 10 May 2013 12:38:36 -0400 Received: from epcpsbgm1.samsung.com (epcpsbgm1 [203.254.230.26]) by mailout3.samsung.com (Oracle Communications Messaging Server 7u4-24.01(7.0.4.24.0) 64bit (built Nov 17 2011)) with ESMTP id <0MML003R7CW2G930@mailout3.samsung.com>; Sat, 11 May 2013 01:38:35 +0900 (KST) X-AuditID: cbfee61a-b7fd56d0000022fd-a2-518d228a323a Received: from epmmp1.local.host ( [203.254.227.16]) by epcpsbgm1.samsung.com (EPCPMTA) with SMTP id 83.8C.08957.A822D815; Sat, 11 May 2013 01:38:34 +0900 (KST) Received: from amdc1344.digital.local ([106.116.147.32]) by mmp1.samsung.com (Oracle Communications Messaging Server 7u4-24.01 (7.0.4.24.0) 64bit (built Nov 17 2011)) with ESMTPA id <0MML007V4CVQ7J40@mmp1.samsung.com>; Sat, 11 May 2013 01:38:34 +0900 (KST) From: Sylwester Nawrocki To: mturquette@linaro.org Cc: kyungmin.park@samsung.com, kgene.kim@samsung.com, inki.dae@samsung.com, linux-samsung-soc@vger.kernel.org, linux-kernel@vger.kernel.org, Sylwester Nawrocki Subject: [PATCH] clk: samsung: Add CLK_IGNORE_UNUSED flag for the sysreg clocks Date: Fri, 10 May 2013 18:38:09 +0200 Message-id: <1368203889-12547-1-git-send-email-s.nawrocki@samsung.com> X-Mailer: git-send-email 1.7.9.5 X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFvrIJMWRmVeSWpSXmKPExsVy+t9jAd0upd5Ag4YWK4tJ9yewWPQuuMpm cbbpDbvF5V1z2CxmnN/HZPF0wkU2i8Nv2lkd2D3uXNvD5tG3ZRWjx+dNcgHMUVw2Kak5mWWp Rfp2CVwZL78tYSqYI1jx8Ml2lgbGc3xdjJwcEgImEmvO/WOHsMUkLtxbz9bFyMUhJLCIUeLg xa0sEE4Hk0T/xoUsIFVsAoYSvUf7GEFsEQFJiQefp4MVMQvsYZTYvfwkK0hCWMBf4tvnc8wg NouAqsSinvtAKzg4eAXcJJo3OYKYEgIKEnMm2Uxg5F7AyLCKUTS1ILmgOCk911CvODG3uDQv XS85P3cTIzggnkntYFzZYHGIUYCDUYmHV0GgN1CINbGsuDL3EKMEB7OSCG/y7Z5AId6UxMqq 1KL8+KLSnNTiQ4zSHCxK4rwHWq0DhQTSE0tSs1NTC1KLYLJMHJxSDYy220Jfay1nbXpXcZxp ouv8a59F3je//aBz5w2vvDGTs2DaqRkL7f76BC81+24rudN5r/Wc7x6qhwx1RXVyhJYfPTRt 9ke/58WXev0m69SqTov/+JmzQj2CVTzkyUZPtsq6deUVvKqmHbkR2/1vdz/mP1JVrjVTzi+1 8+nlg17c4f/CGzzuqCuxFGckGmoxFxUnAgAR0mmJBAIAAA== Sender: linux-samsung-soc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-samsung-soc@vger.kernel.org Currently no driver *) handles the sysreg clock, with an assumption that this clock is always left in its default state (enabled). Before commit 6e6aac7590f902d14d90bace3fd499 ARM: EXYNOS: Migrate clock support to common clock framework the sysreg clock was not even defined and hence wasn't handled explicitly in the kernel. To restore the previous behaviour disable masking the sysreg clock off in the clock core by default. *) Except the Exynos4x12 FIMC-IS driver, which will be modified to not touch the sysreg clock. Signed-off-by: Sylwester Nawrocki Signed-off-by: Kyungmin Park --- drivers/clk/samsung/clk-exynos4.c | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-) -- 1.7.9.5 -- To unsubscribe from this list: send the line "unsubscribe linux-samsung-soc" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html diff --git a/drivers/clk/samsung/clk-exynos4.c b/drivers/clk/samsung/clk-exynos4.c index 070bbeb..0f2f5e5 100644 --- a/drivers/clk/samsung/clk-exynos4.c +++ b/drivers/clk/samsung/clk-exynos4.c @@ -797,7 +797,8 @@ struct samsung_gate_clock exynos4210_gate_clks[] __initdata = { GATE(smmu_pcie, "smmu_pcie", "aclk133", GATE_IP_FSYS, 18, 0, 0), GATE(modemif, "modemif", "aclk100", GATE_IP_PERIL, 28, 0, 0), GATE(chipid, "chipid", "aclk100", E4210_GATE_IP_PERIR, 0, 0, 0), - GATE(sysreg, "sysreg", "aclk100", E4210_GATE_IP_PERIR, 0, 0, 0), + GATE(sysreg, "sysreg", "aclk100", E4210_GATE_IP_PERIR, 0, + CLK_IGNORE_UNUSED, 0), GATE(hdmi_cec, "hdmi_cec", "aclk100", E4210_GATE_IP_PERIR, 11, 0, 0), GATE(smmu_rotator, "smmu_rotator", "aclk200", E4210_GATE_IP_IMAGE, 4, 0, 0), @@ -826,7 +827,8 @@ struct samsung_gate_clock exynos4x12_gate_clks[] __initdata = { GATE(smmu_mdma, "smmu_mdma", "aclk200", E4X12_GATE_IP_IMAGE, 5, 0, 0), GATE(mipi_hsi, "mipi_hsi", "aclk133", GATE_IP_FSYS, 10, 0, 0), GATE(chipid, "chipid", "aclk100", E4X12_GATE_IP_PERIR, 0, 0, 0), - GATE(sysreg, "sysreg", "aclk100", E4X12_GATE_IP_PERIR, 1, 0, 0), + GATE(sysreg, "sysreg", "aclk100", E4X12_GATE_IP_PERIR, 1, + CLK_IGNORE_UNUSED, 0), GATE(hdmi_cec, "hdmi_cec", "aclk100", E4X12_GATE_IP_PERIR, 11, 0, 0), GATE(sclk_mdnie0, "sclk_mdnie0", "div_mdnie0", SRC_MASK_LCD0, 4, CLK_SET_RATE_PARENT, 0),