From patchwork Fri May 24 04:52:57 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Vikas C Sajjan X-Patchwork-Id: 2609501 Return-Path: X-Original-To: patchwork-linux-samsung-soc@patchwork.kernel.org Delivered-To: patchwork-process-083081@patchwork1.kernel.org Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by patchwork1.kernel.org (Postfix) with ESMTP id E64B740077 for ; Fri, 24 May 2013 04:53:30 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752614Ab3EXExa (ORCPT ); Fri, 24 May 2013 00:53:30 -0400 Received: from mail-pd0-f178.google.com ([209.85.192.178]:36039 "EHLO mail-pd0-f178.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1750950Ab3EXExa (ORCPT ); Fri, 24 May 2013 00:53:30 -0400 Received: by mail-pd0-f178.google.com with SMTP id w11so663417pde.23 for ; Thu, 23 May 2013 21:53:29 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20120113; h=from:to:cc:subject:date:message-id:x-mailer:in-reply-to:references :x-gm-message-state; bh=WSEEUftFT0rQK6eS+dmrEH+Ww1KI5iutapczdinIBNk=; b=evYr2d6bIBz6pK++hA48GE3SPdazAD8gnc7BRD8ORINC8p3mk/0ZiYraZsvo5TxBN5 gnUaiGn14V6+KzgU9JpkEwxOyzlkM2zaGnE2stdujKJydKBQTvDDu/IbEmeiU5SxrH5U mW/XSDVBtoxIdnSRsEgUkL9wYWkrS3JHWl+CY2X8nt1mGkp0Plp8CVAyhi8Q4ZLSyEnc MA5ax90t8LVbqaBcfWDquXs89710vbg9Xn9/4mWrem65AduzUzQtiEW7X/cHL84aYI1g NIreJv6cbeGzFUW0j3DqV9DeBAqzgUNnl4UJIe021WePOykH+vO63oHU+z0XaUL2Uobz wV+Q== X-Received: by 10.66.51.165 with SMTP id l5mr9872409pao.73.1369371209664; Thu, 23 May 2013 21:53:29 -0700 (PDT) Received: from localhost.localdomain ([115.113.119.130]) by mx.google.com with ESMTPSA id uv1sm14600412pbc.16.2013.05.23.21.53.25 for (version=TLSv1.1 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Thu, 23 May 2013 21:53:28 -0700 (PDT) From: Vikas Sajjan To: yadi.brar01@gmail.com, linux-samsung-soc@vger.kernel.org Cc: dianders@chromium.org, tomasz.figa@gmail.com, kgene.kim@samsung.com, mturquette@linaro.org, thomas.abraham@linaro.org, patches@linaro.org, linaro-kernel@lists.linaro.org Subject: [PATCH 5/5] clk: samsung: Add EPLL and VPLL freq table for exynos5250 SoC Date: Fri, 24 May 2013 10:22:57 +0530 Message-Id: <1369371177-5413-6-git-send-email-vikas.sajjan@linaro.org> X-Mailer: git-send-email 1.7.9.5 In-Reply-To: <1369371177-5413-1-git-send-email-vikas.sajjan@linaro.org> References: <1369371177-5413-1-git-send-email-vikas.sajjan@linaro.org> X-Gm-Message-State: ALoCoQlGa3Qt/yOJn+kWQKGlIwfGBcoODRzW93Qb7gP82l1o/1qqoQY7jEdgKgboN0heW6NJZDJw Sender: linux-samsung-soc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-samsung-soc@vger.kernel.org Adds the EPLL and VPLL freq table for exynos5250 SoC. Signed-off-by: Vikas Sajjan --- drivers/clk/samsung/clk-exynos5250.c | 19 +++++++++++++++++-- 1 file changed, 17 insertions(+), 2 deletions(-) diff --git a/drivers/clk/samsung/clk-exynos5250.c b/drivers/clk/samsung/clk-exynos5250.c index ddf10ca..00d1fa6 100644 --- a/drivers/clk/samsung/clk-exynos5250.c +++ b/drivers/clk/samsung/clk-exynos5250.c @@ -469,6 +469,21 @@ static __initdata struct of_device_id ext_clk_match[] = { { }, }; +static struct samsung_pll_rate_table vpll_tbl[] = { + PLL_36XX_RATE(70500000, 2, 94, 4, 0), +}; + +static struct samsung_pll_rate_table epll_tbl[] = { + PLL_36XX_RATE(192000000, 48, 3, 1, 0), + PLL_36XX_RATE(180000000, 45, 3, 1, 0), + PLL_36XX_RATE(73728000, 73, 3, 3, 47710), + PLL_36XX_RATE(67737600, 90, 4, 3, 20762), + PLL_36XX_RATE(49152000, 49, 3, 3, 9961), + PLL_36XX_RATE(45158400, 45, 3, 3, 10381), + PLL_36XX_RATE(180633600, 45, 3, 1, 10381), + PLL_36XX_RATE(32768000, 131, 3, 5, 4719), +}; + /* register exynox5250 clocks */ void __init exynos5250_clk_init(struct device_node *np) { @@ -501,9 +516,9 @@ void __init exynos5250_clk_init(struct device_node *np) cpll = samsung_clk_register_pll35xx("fout_cpll", "fin_pll", reg_base + 0x10020, NULL, 0); epll = samsung_clk_register_pll36xx("fout_epll", "fin_pll", - reg_base + 0x10030, NULL, 0); + reg_base + 0x10030, epll_tbl, ARRAY_SIZE(epll_tbl)); vpll = samsung_clk_register_pll36xx("fout_vpll", "mout_vpllsrc", - reg_base + 0x10040, NULL, 0); + reg_base + 0x10040, vpll_tbl, ARRAY_SIZE(vpll_tbl)); samsung_clk_register_fixed_rate(exynos5250_fixed_rate_clks, ARRAY_SIZE(exynos5250_fixed_rate_clks));