From patchwork Fri May 24 05:55:18 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Vikas C Sajjan X-Patchwork-Id: 2609611 Return-Path: X-Original-To: patchwork-linux-samsung-soc@patchwork.kernel.org Delivered-To: patchwork-process-083081@patchwork1.kernel.org Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by patchwork1.kernel.org (Postfix) with ESMTP id A5C883FD4E for ; Fri, 24 May 2013 05:55:44 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1754808Ab3EXFzl (ORCPT ); Fri, 24 May 2013 01:55:41 -0400 Received: from mail-pb0-f45.google.com ([209.85.160.45]:48116 "EHLO mail-pb0-f45.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752581Ab3EXFzk (ORCPT ); Fri, 24 May 2013 01:55:40 -0400 Received: by mail-pb0-f45.google.com with SMTP id mc17so3809963pbc.18 for ; Thu, 23 May 2013 22:55:40 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20120113; h=from:to:subject:date:message-id:x-mailer:in-reply-to:references :x-gm-message-state; bh=sU3dgOp7/hgJ4jbbj8dG6FF3jPiD+eBTiazxl0YP8Qk=; b=n+54IXG45Da1hamxe5JREHh1jqzjarHRxOFUg0L2Z/ksebTEK6FuJstf/2Rzl34N8g Re6QNjHuPwRUR9WfhATJuI5yHvBJP04tXbmOlolTxGrtGWSCmv1nVbS1R13Rfw48Vbqw IePSKEK/OxeJ6BtzYSVkd1dAZDU666JFC9yCSJOAT5nONL/3cNtnkhQyRTIkxDaV1E+W LcBjdvh9EX5MOYOjWojXxrujvnMxRs445T/bae/wFUiWfDndyGsJ3L5bIY4ZJ0S2mu2/ qP8YlN5bgeetsuanUWwhxdmgkwfNPgbjHhMfY4AS7Vqa+d/mmB/r5h2qClU3DOA8Pek3 d+gw== X-Received: by 10.67.5.168 with SMTP id cn8mr17024350pad.119.1369374939930; Thu, 23 May 2013 22:55:39 -0700 (PDT) Received: from localhost.localdomain ([115.113.119.130]) by mx.google.com with ESMTPSA id kr16sm15955475pab.23.2013.05.23.22.55.37 for (version=TLSv1.1 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Thu, 23 May 2013 22:55:38 -0700 (PDT) From: Vikas Sajjan To: linux-samsung-soc@vger.kernel.org Subject: [RESEND PATCH 4/5] clk: samsung: Add set_rate() clk_ops for PLL36xx Date: Fri, 24 May 2013 11:25:18 +0530 Message-Id: <1369374919-6214-5-git-send-email-vikas.sajjan@linaro.org> X-Mailer: git-send-email 1.7.9.5 In-Reply-To: <1369374919-6214-1-git-send-email-vikas.sajjan@linaro.org> References: <1369374919-6214-1-git-send-email-vikas.sajjan@linaro.org> X-Gm-Message-State: ALoCoQk0gftbqMi9FOc2884Ocdgjywp6oLMfrFPmSxPYbzdwWQwXkIquYjHaVO1gUuwvefw+45XM Sender: linux-samsung-soc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-samsung-soc@vger.kernel.org This patch adds set_rate and round_rate clk_ops for PLL36xx The round_rate() implementation as of now is dummy, it returns the same rate which is passed as input. Signed-off-by: Vikas Sajjan --- drivers/clk/samsung/clk-pll.c | 67 +++++++++++++++++++++++++++++++++++++++++ 1 file changed, 67 insertions(+) diff --git a/drivers/clk/samsung/clk-pll.c b/drivers/clk/samsung/clk-pll.c index 291cc9e..55ff5fd 100644 --- a/drivers/clk/samsung/clk-pll.c +++ b/drivers/clk/samsung/clk-pll.c @@ -224,6 +224,13 @@ struct clk * __init samsung_clk_register_pll35xx(const char *name, #define PLL36XX_MDIV_SHIFT (16) #define PLL36XX_PDIV_SHIFT (8) #define PLL36XX_SDIV_SHIFT (0) +#define PLL36XX_KDIV_SHIFT (0) +#define PLL36XX_LOCK_STAT_SHIFT (29) + +#define PLL36XX_MDIV(_tmp) ((_tmp) & (PLL36XX_MDIV_MASK << PLL36XX_MDIV_SHIFT)) +#define PLL36XX_PDIV(_tmp) ((_tmp) & (PLL36XX_PDIV_MASK << PLL36XX_PDIV_SHIFT)) +#define PLL36XX_SDIV(_tmp) ((_tmp) & (PLL36XX_SDIV_MASK << PLL36XX_SDIV_SHIFT)) +#define PLL36XX_KDIV(_tmp) ((_tmp) & (PLL36XX_KDIV_MASK << PLL36XX_KDIV_SHIFT)) static unsigned long samsung_pll36xx_recalc_rate(struct clk_hw *hw, unsigned long parent_rate) @@ -246,8 +253,65 @@ static unsigned long samsung_pll36xx_recalc_rate(struct clk_hw *hw, return (unsigned long)fvco; } +static long samsung_pll36xx_round_rate(struct clk_hw *hw, unsigned long drate, + unsigned long *prate) +{ + /* retruns the same 'drate' whichs comes as input */ + return drate; +} + +static int samsung_pll36xx_set_rate(struct clk_hw *hw, unsigned long drate, + unsigned long parent_rate) +{ + struct samsung_clk_pll *pll = to_clk_pll(hw); + u32 tmp, pll_con0, pll_con1, mdiv, pdiv, sdiv, kdiv; + struct samsung_pll_rate_table *rate; + + rate = samsung_get_pll_settings(pll, drate); + if (!rate) { + pr_err("%s: Invalid rate : %lu for pll clk %s\n", __func__, + drate, __clk_get_name(hw->clk)); + return -EINVAL; + } + + mdiv = PLL36XX_MDIV(rate->pll_con0); + pdiv = PLL36XX_PDIV(rate->pll_con0); + sdiv = PLL36XX_SDIV(rate->pll_con0); + kdiv = PLL36XX_KDIV(rate->pll_con1); + + pll_con0 = pll_readl(pll, PLL36XX_CON0_OFFSET); + pll_con1 = pll_readl(pll, PLL36XX_CON1_OFFSET); + + pll_con1 &= ~(PLL36XX_KDIV_MASK << PLL36XX_KDIV_SHIFT); + + /* Set PLL lock time. + Maximum lock time can be 3000 * PDIV cycles */ + pll_writel(pll, ((pdiv >> PLL36XX_PDIV_SHIFT) * 3000), + PLL36XX_LOCK_OFFSET); + + /* Change PLL PMS values */ + pll_con0 &= ~((PLL36XX_MDIV_MASK << PLL36XX_MDIV_SHIFT) | + (PLL36XX_PDIV_MASK << PLL36XX_PDIV_SHIFT) | + (PLL36XX_SDIV_MASK << PLL36XX_SDIV_SHIFT)); + pll_con0 |= mdiv | pdiv | sdiv; + pll_writel(pll, pll_con0, PLL36XX_CON0_OFFSET); + + pll_con1 |= kdiv; + pll_writel(pll, pll_con1, PLL36XX_CON1_OFFSET); + + /* wait_lock_time */ + do { + cpu_relax(); + tmp = pll_readl(pll, PLL36XX_CON0_OFFSET); + } while (!(tmp & (1 << PLL36XX_LOCK_STAT_SHIFT))); + + return 0; +} + static const struct clk_ops samsung_pll36xx_clk_ops = { .recalc_rate = samsung_pll36xx_recalc_rate, + .set_rate = samsung_pll36xx_set_rate, + .round_rate = samsung_pll36xx_round_rate, }; struct clk * __init samsung_clk_register_pll36xx(const char *name, @@ -280,6 +344,9 @@ struct clk * __init samsung_clk_register_pll36xx(const char *name, sort(pll->rate_table, pll->rate_count, sizeof(struct samsung_pll_rate_table), samsung_compare_rate, NULL); + } else { + samsung_pll35xx_clk_ops.round_rate = NULL; + samsung_pll35xx_clk_ops.set_rate = NULL; } clk = clk_register(NULL, &pll->hw);