From patchwork Sat Jun 8 17:34:21 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Yadwinder Singh Brar X-Patchwork-Id: 2736291 Return-Path: X-Original-To: patchwork-linux-samsung-soc@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork2.web.kernel.org (Postfix) with ESMTP id 7E577C0AB1 for ; Mon, 17 Jun 2013 17:42:58 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 57C75204FE for ; Mon, 17 Jun 2013 17:42:57 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 46133204FD for ; Mon, 17 Jun 2013 17:42:55 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1754743Ab3FQRmu (ORCPT ); Mon, 17 Jun 2013 13:42:50 -0400 Received: from mailout3.samsung.com ([203.254.224.33]:50599 "EHLO mailout3.samsung.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1754482Ab3FQRmr (ORCPT ); Mon, 17 Jun 2013 13:42:47 -0400 Received: from epcpsbgr2.samsung.com (u142.gpu120.samsung.co.kr [203.254.230.142]) by mailout3.samsung.com (Oracle Communications Messaging Server 7u4-24.01 (7.0.4.24.0) 64bit (built Nov 17 2011)) with ESMTP id <0MOJ00JG3T7AEBB0@mailout3.samsung.com> for linux-samsung-soc@vger.kernel.org; Tue, 18 Jun 2013 02:42:46 +0900 (KST) Received: from epcpsbgm2.samsung.com ( [172.20.52.122]) by epcpsbgr2.samsung.com (EPCPMTA) with SMTP id 6F.CB.08825.69A4FB15; Tue, 18 Jun 2013 02:42:46 +0900 (KST) X-AuditID: cbfee68e-b7f276d000002279-85-51bf4a96a36b Received: from epmmp1.local.host ( [203.254.227.16]) by epcpsbgm2.samsung.com (EPCPMTA) with SMTP id 65.06.21068.69A4FB15; Tue, 18 Jun 2013 02:42:46 +0900 (KST) Received: from localhost.localdomain ([107.108.83.81]) by mmp1.samsung.com (Oracle Communications Messaging Server 7u4-24.01 (7.0.4.24.0) 64bit (built Nov 17 2011)) with ESMTPA id <0MOJ004JHT6L7730@mmp1.samsung.com>; Tue, 18 Jun 2013 02:42:46 +0900 (KST) From: Yadwinder Singh Brar To: linux-samsung-soc@vger.kernel.org Cc: linux-arm-kernel@lists.infradead.org, kgene.kim@samsung.com, mturquette@linaro.org, thomas.abraham@linaro.org, dianders@chromium.org, t.figa@samsung.com, vikas.sajjan@linaro.org, abrestic@chromium.org, Yadwinder Singh Brar Subject: [PATCH v5 6/7] clk: samsung: Reorder MUX registration for mout_vpllsrc Date: Sat, 08 Jun 2013 23:04:21 +0530 Message-id: <1370712862-10501-7-git-send-email-yadi.brar@samsung.com> X-Mailer: git-send-email 1.7.0.4 In-reply-to: <1370712862-10501-1-git-send-email-yadi.brar@samsung.com> References: <1370712862-10501-1-git-send-email-yadi.brar@samsung.com> X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFmpmkeLIzCtJLcpLzFFi42JZI2JSpTvNa3+gwf8nwhYr3/9ltDi77CCb Re+Cq2wWmx5fY7WYcX4fk8XTCRfZLNbPeM1icWzGEkaLJ4+2MVvMmf6OyYHLY3bDRRaPO9f2 sHlsXlLv0bdlFaPH501yAaxRXDYpqTmZZalF+nYJXBm3VvxhLbgnWHF7WjtLA+NS/i5GTg4J AROJlvML2CBsMYkL99YD2VwcQgJLGSVmHlzDBFN0uHMmVGIRo8T6Y51gCSGBNiaJbfeZuxg5 ONgEjCReHbMDCYsIqEp8blvADlLPLNDAJNG16TgzSEJYwF/i+p8ZrCA2C1DR8Q3TWUBsXgFX iQ9tU6CuUJBoXXaIHcTmFHCTWHbyAiPIfCGgmkWXvUFmSghsY5f40tsNNUdA4tvkQywgNRIC shKbDjBDjJGUOLjiBssERuEFjAyrGEVTC5ILipPSi4z0ihNzi0vz0vWS83M3MQIj4PS/Z307 GG8esD7EmAw0biKzlGhyPjCC8kriDY3NjCxMTUyNjcwtzUgTVhLnVWuxDhQSSE8sSc1OTS1I LYovKs1JLT7EyMTBKdXA6PtwLee5NbXxBomaX5M91cp9T3NeCW7mOvjhXev2IyoLz3KVCS+9 6HY4pj59Qv63f2ZMT099i/aWrzydcmvv1LA3+q9nLZn09lnFTY3A93Pv1/w+n673zvRlvfb6 spyNNUfNJSLdpu3j+HZ4woXiyTUsAQ3Mv6ZyNhea2Mefczizq/1FipPtSSWW4oxEQy3mouJE ABKmPN6WAgAA X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFnrAIsWRmVeSWpSXmKPExsVy+t9jAd1pXvsDDXZ+4LRY+f4vo8XZZQfZ LHoXXGWz2PT4GqvFjPP7mCyeTrjIZrF+xmsWi2MzljBaPHm0jdlizvR3TA5cHrMbLrJ43Lm2 h81j85J6j74tqxg9Pm+SC2CNamC0yUhNTEktUkjNS85PycxLt1XyDo53jjc1MzDUNbS0MFdS yEvMTbVVcvEJ0HXLzAG6SkmhLDGnFCgUkFhcrKRvh2lCaIibrgVMY4Sub0gQXI+RARpIWMOY cWvFH9aCe4IVt6e1szQwLuXvYuTkkBAwkTjcOZMNwhaTuHBvPZDNxSEksIhRYv2xTiaQhJBA G5PEtvvMXYwcHGwCRhKvjtmBhEUEVCU+ty1gB6lnFmhgkujadJwZJCEs4C9x/c8MVhCbBajo +IbpLCA2r4CrxIe2KVDLFCRalx1iB7E5Bdwklp28wAgyXwioZtFl7wmMvAsYGVYxiqYWJBcU J6XnGukVJ+YWl+al6yXn525iBMfXM+kdjKsaLA4xCnAwKvHwJojtDxRiTSwrrsw9xCjBwawk whs7cV+gEG9KYmVValF+fFFpTmrxIcZkoKMmMkuJJucDYz+vJN7Q2MTc1NjU0sTCxMySNGEl cd6DrdaBQgLpiSWp2ampBalFMFuYODilGhiXTXr1+kXWO5ew258O5kgfXWYccXx3DMPTGDkh hqkm8a/aRJ1uFptf73s3+cFqzVumrxKvdewou9IX3rJA98hkXsOd1wQsDvGo2DLY/HhUzMQq 4MuqH8cZ/GvX9pQg02kqpz8z+fac8/t59KRo4LJr15XX1oq6uL97XZ5YLln2trJ3zkHz+6uU WIozEg21mIuKEwF8Wdrd8wIAAA== DLP-Filter: Pass X-MTR: 20000000000000000@CPGS X-CFilter-Loop: Reflected Sender: linux-samsung-soc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-samsung-soc@vger.kernel.org X-Spam-Status: No, score=-4.6 required=5.0 tests=BAYES_00, DATE_IN_PAST_96_XX, RCVD_IN_DNSWL_HI, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP From: Vikas Sajjan While trying to get rate of "mout_vpllsrc" MUX (parent) for registering the "fout_vpll" (child), we found get rate was failing. So this patch moves the mout_vpllsrc MUX out of the existing common list and registers the mout_vpllsrc MUX before the PLL registrations. Reviewed-by: Tomasz Figa Signed-off-by: Vikas Sajjan Signed-off-by: Yadwinder Singh Brar --- drivers/clk/samsung/clk-exynos5250.c | 7 ++++++- 1 files changed, 6 insertions(+), 1 deletions(-) diff --git a/drivers/clk/samsung/clk-exynos5250.c b/drivers/clk/samsung/clk-exynos5250.c index a025269..09da356 100644 --- a/drivers/clk/samsung/clk-exynos5250.c +++ b/drivers/clk/samsung/clk-exynos5250.c @@ -227,6 +227,10 @@ struct samsung_fixed_factor_clock exynos5250_fixed_factor_clks[] __initdata = { FFACTOR(none, "fout_bplldiv2", "fout_bpll", 1, 2, 0), }; +struct samsung_mux_clock exynos5250_pll_pmux_clks[] __initdata = { + MUX(none, "mout_vpllsrc", mout_vpllsrc_p, SRC_TOP2, 0, 1), +}; + struct samsung_mux_clock exynos5250_mux_clks[] __initdata = { MUX(none, "mout_apll", mout_apll_p, SRC_CPU, 0, 1), MUX(none, "mout_cpu", mout_cpu_p, SRC_CPU, 16, 1), @@ -234,7 +238,6 @@ struct samsung_mux_clock exynos5250_mux_clks[] __initdata = { MUX(none, "sclk_mpll", mout_mpll_p, SRC_CORE1, 8, 1), MUX(none, "mout_bpll_fout", mout_bpll_fout_p, PLL_DIV2_SEL, 0, 1), MUX(none, "sclk_bpll", mout_bpll_p, SRC_CDREX, 0, 1), - MUX(none, "mout_vpllsrc", mout_vpllsrc_p, SRC_TOP2, 0, 1), MUX(none, "sclk_vpll", mout_vpll_p, SRC_TOP2, 16, 1), MUX(none, "sclk_epll", mout_epll_p, SRC_TOP2, 12, 1), MUX(none, "sclk_cpll", mout_cpll_p, SRC_TOP2, 8, 1), @@ -525,6 +528,8 @@ void __init exynos5250_clk_init(struct device_node *np) samsung_clk_of_register_fixed_ext(exynos5250_fixed_rate_ext_clks, ARRAY_SIZE(exynos5250_fixed_rate_ext_clks), ext_clk_match); + samsung_clk_register_mux(exynos5250_pll_pmux_clks, + ARRAY_SIZE(exynos5250_pll_pmux_clks)); samsung_clk_register_pll(exynos5250_plls, ARRAY_SIZE(exynos5250_plls), reg_base); samsung_clk_register_fixed_rate(exynos5250_fixed_rate_clks,