From patchwork Sat Jun 8 17:34:22 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Yadwinder Singh Brar X-Patchwork-Id: 2736301 Return-Path: X-Original-To: patchwork-linux-samsung-soc@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork1.web.kernel.org (Postfix) with ESMTP id 90BD39F3A0 for ; Mon, 17 Jun 2013 17:42:59 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 68C47204FB for ; Mon, 17 Jun 2013 17:42:58 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 55881204F7 for ; Mon, 17 Jun 2013 17:42:57 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753564Ab3FQRmw (ORCPT ); Mon, 17 Jun 2013 13:42:52 -0400 Received: from mailout3.samsung.com ([203.254.224.33]:50603 "EHLO mailout3.samsung.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1754688Ab3FQRmu (ORCPT ); Mon, 17 Jun 2013 13:42:50 -0400 Received: from epcpsbgr2.samsung.com (u142.gpu120.samsung.co.kr [203.254.230.142]) by mailout3.samsung.com (Oracle Communications Messaging Server 7u4-24.01 (7.0.4.24.0) 64bit (built Nov 17 2011)) with ESMTP id <0MOJ00JG3T7AEBB0@mailout3.samsung.com> for linux-samsung-soc@vger.kernel.org; Tue, 18 Jun 2013 02:42:49 +0900 (KST) Received: from epcpsbgm2.samsung.com ( [172.20.52.122]) by epcpsbgr2.samsung.com (EPCPMTA) with SMTP id 30.DB.08825.89A4FB15; Tue, 18 Jun 2013 02:42:49 +0900 (KST) X-AuditID: cbfee68e-b7f276d000002279-8e-51bf4a98a4e4 Received: from epmmp1.local.host ( [203.254.227.16]) by epcpsbgm2.samsung.com (EPCPMTA) with SMTP id 16.06.21068.89A4FB15; Tue, 18 Jun 2013 02:42:48 +0900 (KST) Received: from localhost.localdomain ([107.108.83.81]) by mmp1.samsung.com (Oracle Communications Messaging Server 7u4-24.01 (7.0.4.24.0) 64bit (built Nov 17 2011)) with ESMTPA id <0MOJ004JHT6L7730@mmp1.samsung.com>; Tue, 18 Jun 2013 02:42:48 +0900 (KST) From: Yadwinder Singh Brar To: linux-samsung-soc@vger.kernel.org Cc: linux-arm-kernel@lists.infradead.org, kgene.kim@samsung.com, mturquette@linaro.org, thomas.abraham@linaro.org, dianders@chromium.org, t.figa@samsung.com, vikas.sajjan@linaro.org, abrestic@chromium.org, Yadwinder Singh Brar Subject: [PATCH v5 7/7] clk: samsung: Add EPLL and VPLL freq table for exynos5250 SoC Date: Sat, 08 Jun 2013 23:04:22 +0530 Message-id: <1370712862-10501-8-git-send-email-yadi.brar@samsung.com> X-Mailer: git-send-email 1.7.0.4 In-reply-to: <1370712862-10501-1-git-send-email-yadi.brar@samsung.com> References: <1370712862-10501-1-git-send-email-yadi.brar@samsung.com> X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFmpmkeLIzCtJLcpLzFFi42JZI2JSpTvTa3+gwZ0eVouV7/8yWpxddpDN onfBVTaLTY+vsVrMOL+PyeLphItsFutnvGaxODZjCaPFk0fbmC3mTH/H5MDlMbvhIovHnWt7 2Dw2L6n36NuyitHj8ya5ANYoLpuU1JzMstQifbsEroy3x54xFfwSr2ib8Je5gfGbcBcjJ4eE gInExnNv2SFsMYkL99azdTFycQgJLGWU2LhnM2sXIwdY0ZEnWRDxRYwSJ+dfgipqY5I43HiP GaSITcBI4tUxO5BBIgKqEp/bFrCD1DALNDBJdG06zgySEBYIlzh2cS2YzQJUNH39E0YQm1fA VWL7ss+sEFcoSLQuOwR2EaeAm8SykxcYQeYLAdUsuuwNMlNCYBu7xKmzk9gg5ghIfJt8iAXi UFmJTQeYIcZIShxccYNlAqPwAkaGVYyiqQXJBcVJ6UVGesWJucWleel6yfm5mxiBEXD637O+ HYw3D1gfYkwGGjeRWUo0OR8YQXkl8YbGZkYWpiamxkbmlmakCSuJ86q1WAcKCaQnlqRmp6YW pBbFF5XmpBYfYmTi4JRqYOTZfbl4xsTgjt02vz/8lcxLURGJkbnnf3w2Q/5ntRiNTEGLoE+6 XKvCuKXO5TZJ7l99/V/X7vnLA80krHOcfry8rzTH1f7LWz/FjLYl6sl7mB1eKOoxeLJeiK+S y9130Kjs4eclD0KcXkZZnd9yX+OAmvnyr895T00Tjv++9kP0RvY1fCESxUosxRmJhlrMRcWJ ALI8J3KWAgAA X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFnrAIsWRmVeSWpSXmKPExsVy+t9jAd0ZXvsDDWbvtbRY+f4vo8XZZQfZ LHoXXGWz2PT4GqvFjPP7mCyeTrjIZrF+xmsWi2MzljBaPHm0jdlizvR3TA5cHrMbLrJ43Lm2 h81j85J6j74tqxg9Pm+SC2CNamC0yUhNTEktUkjNS85PycxLt1XyDo53jjc1MzDUNbS0MFdS yEvMTbVVcvEJ0HXLzAG6SkmhLDGnFCgUkFhcrKRvh2lCaIibrgVMY4Sub0gQXI+RARpIWMOY 8fbYM6aCX+IVbRP+MjcwfhPuYuTgkBAwkTjyJKuLkRPIFJO4cG89WxcjF4eQwCJGiZPzL0E5 bUwShxvvMYM0sAkYSbw6ZgfSICKgKvG5bQE7SA2zQAOTRNem48wgCWGBcIljF9eC2SxARdPX P2EEsXkFXCW2L/vMCrFNQaJ12SF2EJtTwE1i2ckLjCDzhYBqFl32nsDIu4CRYRWjaGpBckFx UnqukV5xYm5xaV66XnJ+7iZGcHw9k97BuKrB4hCjAAejEg9vgtj+QCHWxLLiytxDjBIczEoi vLET9wUK8aYkVlalFuXHF5XmpBYfYkwGOmois5Rocj4w9vNK4g2NTcxNjU0tTSxMzCxJE1YS 5z3Yah0oJJCeWJKanZpakFoEs4WJg1OqgdF6beUL26nzLyjGSx9VWJD1+7psWLn7Z92WO9u/ sk82We7HsWjj7jfp74Mq5mkIpt86ec1IfKLHn/WJbOdFD3NOvi1ntzQ3fNqDZXlVyR6MFrFb ntzzlBFnlw8/K3718rM3NmF6j5el3WVayHDup0bJlIqfrbdW5/WEr5Q/P7mHefeeCvfZC98q sRRnJBpqMRcVJwIAYCQ5BPMCAAA= DLP-Filter: Pass X-MTR: 20000000000000000@CPGS X-CFilter-Loop: Reflected Sender: linux-samsung-soc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-samsung-soc@vger.kernel.org X-Spam-Status: No, score=-4.6 required=5.0 tests=BAYES_00, DATE_IN_PAST_96_XX, RCVD_IN_DNSWL_HI, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Adds the EPLL and VPLL freq table for exynos5250 SoC. Signed-off-by: Vikas Sajjan Signed-off-by: Yadwinder Singh Brar --- drivers/clk/samsung/clk-exynos5250.c | 38 ++++++++++++++++++++++++++++++++++ drivers/clk/samsung/clk.h | 2 + 2 files changed, 40 insertions(+), 0 deletions(-) diff --git a/drivers/clk/samsung/clk-exynos5250.c b/drivers/clk/samsung/clk-exynos5250.c index 09da356..d2743f9 100644 --- a/drivers/clk/samsung/clk-exynos5250.c +++ b/drivers/clk/samsung/clk-exynos5250.c @@ -492,6 +492,29 @@ static __initdata struct of_device_id ext_clk_match[] = { { }, }; +static __initdata struct samsung_pll_rate_table vpll_24mhz_tbl[] = { + /* sorted in descending order */ + /* PLL_36XX_RATE(rate, m, p, s, k) */ + PLL_36XX_RATE(266000000, 266, 3, 3, 0), + /* Not in UM, but need for eDP on snow */ + PLL_36XX_RATE(70500000, 94, 2, 4, 0), + { }, +}; + +static __initdata struct samsung_pll_rate_table epll_24mhz_tbl[] = { + /* sorted in descending order */ + /* PLL_36XX_RATE(rate, m, p, s, k) */ + PLL_36XX_RATE(192000000, 48, 3, 1, 0), + PLL_36XX_RATE(180633600, 45, 3, 1, 10381), + PLL_36XX_RATE(180000000, 45, 3, 1, 0), + PLL_36XX_RATE(73728000, 73, 3, 3, 47710), + PLL_36XX_RATE(67737600, 90, 4, 3, 20762), + PLL_36XX_RATE(49152000, 49, 3, 3, 9962), + PLL_36XX_RATE(45158400, 45, 3, 3, 10381), + PLL_36XX_RATE(32768000, 131, 3, 5, 4719), + { }, +}; + struct __initdata samsung_pll_clock exynos5250_plls[nr_plls] = { [apll] = PLL_A(pll_35xx, fout_apll, "fout_apll", "fin_pll", APLL_LOCK, APLL_CON0, "fout_apll", NULL), @@ -513,6 +536,8 @@ struct __initdata samsung_pll_clock exynos5250_plls[nr_plls] = { void __init exynos5250_clk_init(struct device_node *np) { void __iomem *reg_base; + struct clk *vpllsrc; + unsigned long fin_pll_rate, mout_vpllsrc_rate = 0; if (np) { reg_base = of_iomap(np, 0); @@ -530,6 +555,19 @@ void __init exynos5250_clk_init(struct device_node *np) ext_clk_match); samsung_clk_register_mux(exynos5250_pll_pmux_clks, ARRAY_SIZE(exynos5250_pll_pmux_clks)); + + fin_pll_rate = _get_rate("fin_pll"); + + if (fin_pll_rate == (24 * MHZ)) + exynos5250_plls[epll].rate_table = epll_24mhz_tbl; + + vpllsrc = __clk_lookup("mout_vpllsrc"); + if (vpllsrc) + mout_vpllsrc_rate = clk_get_rate(vpllsrc); + + if (mout_vpllsrc_rate == (24 * MHZ)) + exynos5250_plls[vpll].rate_table = vpll_24mhz_tbl; + samsung_clk_register_pll(exynos5250_plls, ARRAY_SIZE(exynos5250_plls), reg_base); samsung_clk_register_fixed_rate(exynos5250_fixed_rate_clks, diff --git a/drivers/clk/samsung/clk.h b/drivers/clk/samsung/clk.h index 3e6501c..378bf98 100644 --- a/drivers/clk/samsung/clk.h +++ b/drivers/clk/samsung/clk.h @@ -40,6 +40,8 @@ struct samsung_clock_alias { .alias = a, \ } +#define MHZ (1000*1000) + /** * struct samsung_fixed_rate_clock: information about fixed-rate clock * @id: platform specific id of the clock.