From patchwork Mon Jun 10 13:24:18 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Yadwinder Singh Brar X-Patchwork-Id: 2749551 Return-Path: X-Original-To: patchwork-linux-samsung-soc@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork1.web.kernel.org (Postfix) with ESMTP id 4C09B9F39E for ; Wed, 19 Jun 2013 13:32:49 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 2C61A20315 for ; Wed, 19 Jun 2013 13:32:48 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 6764920318 for ; Wed, 19 Jun 2013 13:32:43 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1756762Ab3FSNcm (ORCPT ); Wed, 19 Jun 2013 09:32:42 -0400 Received: from mailout1.samsung.com ([203.254.224.24]:54151 "EHLO mailout1.samsung.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1756740Ab3FSNcl (ORCPT ); Wed, 19 Jun 2013 09:32:41 -0400 Received: from epcpsbgr1.samsung.com (u141.gpu120.samsung.co.kr [203.254.230.141]) by mailout1.samsung.com (Oracle Communications Messaging Server 7u4-24.01 (7.0.4.24.0) 64bit (built Nov 17 2011)) with ESMTP id <0MON00LJH6YDURV0@mailout1.samsung.com> for linux-samsung-soc@vger.kernel.org; Wed, 19 Jun 2013 22:32:40 +0900 (KST) Received: from epcpsbgm1.samsung.com ( [172.20.52.122]) by epcpsbgr1.samsung.com (EPCPMTA) with SMTP id 2D.82.17404.8F2B1C15; Wed, 19 Jun 2013 22:32:40 +0900 (KST) X-AuditID: cbfee68d-b7f096d0000043fc-4b-51c1b2f8071f Received: from epmmp2 ( [203.254.227.17]) by epcpsbgm1.samsung.com (EPCPMTA) with SMTP id E5.D6.28381.7F2B1C15; Wed, 19 Jun 2013 22:32:40 +0900 (KST) Received: from localhost.localdomain ([107.108.83.81]) by mmp2.samsung.com (Oracle Communications Messaging Server 7u4-24.01 (7.0.4.24.0) 64bit (built Nov 17 2011)) with ESMTPA id <0MON00DH96XUF820@mmp2.samsung.com>; Wed, 19 Jun 2013 22:32:39 +0900 (KST) From: Yadwinder Singh Brar To: linux-samsung-soc@vger.kernel.org Cc: linux-arm-kernel@lists.infradead.org, kgene.kim@samsung.com, mturquette@linaro.org, thomas.abraham@linaro.org, dianders@chromium.org, t.figa@samsung.com, vikas.sajjan@linaro.org, abrestic@chromium.org, Yadwinder Singh Brar Subject: [PATCH v6 6/7] clk: samsung: Reorder MUX registration for mout_vpllsrc Date: Mon, 10 Jun 2013 18:54:18 +0530 Message-id: <1370870659-10929-7-git-send-email-yadi.brar@samsung.com> X-Mailer: git-send-email 1.7.0.4 In-reply-to: <1370870659-10929-1-git-send-email-yadi.brar@samsung.com> References: <1370870659-10929-1-git-send-email-yadi.brar@samsung.com> X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFmpmkeLIzCtJLcpLzFFi42JZI2JSpftj08FAgzWHOC1Wvv/LaHF22UE2 i94FV9ksNj2+xmox4/w+JounEy6yWayf8ZrF4tiMJYwWTx5tY7aYM/0dkwOXx+yGiywed67t YfPYvKTeo2/LKkaPz5vkAlijuGxSUnMyy1KL9O0SuDK+rN/LWnBPsGLmwc/MDYxL+bsYOTkk BEwk1jyYzg5hi0lcuLeerYuRi0NIYCmjxLGjX5lgitatWs4KYgsJTGeUWNDnCVHUxiQxdc87 5i5GDg42ASOJV8fsQGpEBFQlPrctYAepYRZoYJLo2nScGSQhLOAv0XjnNJjNAlT08v0zFhCb V8BVoqXvAhvEMgWJ1mWHwC7iFHCTmLF9AxvEYleJhpP/GCFqNrFLHPksCTFHQOLb5EMsIDdI CMhKbDrADFEiKXFwxQ2WCYzCCxgZVjGKphYkFxQnpRcZ6hUn5haX5qXrJefnbmIERsDpf896 dzDePmB9iDEZaNxEZinR5HxgBOWVxBsamxlZmJqYGhuZW5qRJqwkzqvWYh0oJJCeWJKanZpa kFoUX1Sak1p8iJGJg1OqgVFcPWBBgOPcMzvangsZVrmuYGRqvHLJ2XJGwim7p6vLt+3Z4/+z N0M0aYG//5I2awHWlZlq8fpzk/6u5nXi9PM/Hi3AcprvRQ+31e+9TyPan9tYy3Yt9urw4J65 y6+xqVHiv6lamNzDe+7fOiZ9+TQ7Pl3v78LX2QJFvz55WjH/7sr8y1GpocRSnJFoqMVcVJwI AItwapiWAgAA X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFnrAIsWRmVeSWpSXmKPExsVy+t9jQd0fmw4GGpwUs1j5/i+jxdllB9ks ehdcZbPY9Pgaq8WM8/uYLJ5OuMhmsX7GaxaLYzOWMFo8ebSN2WLO9HdMDlwesxsusnjcubaH zWPzknqPvi2rGD0+b5ILYI1qYLTJSE1MSS1SSM1Lzk/JzEu3VfIOjneONzUzMNQ1tLQwV1LI S8xNtVVy8QnQdcvMATpKSaEsMacUKBSQWFyspG+HaUJoiJuuBUxjhK5vSBBcj5EBGkhYw5jx Zf1e1oJ7ghUzD35mbmBcyt/FyMkhIWAisW7VclYIW0ziwr31bCC2kMB0RokFfZ5djFxAdhuT xNQ975i7GDk42ASMJF4dswOpERFQlfjctoAdpIZZoIFJomvTcWaQhLCAv0TjndNgNgtQ0cv3 z1hAbF4BV4mWvgtsEMsUJFqXHWIHsTkF3CRmbN8AtdhVouHkP8YJjLwLGBlWMYqmFiQXFCel 5xrqFSfmFpfmpesl5+duYgTH1zOpHYwrGywOMQpwMCrx8DasPBAoxJpYVlyZe4hRgoNZSYQX 6NlAId6UxMqq1KL8+KLSnNTiQ4zJQFdNZJYSTc4Hxn5eSbyhsYm5qbGppYmFiZklacJK4rwH Wq0DhQTSE0tSs1NTC1KLYLYwcXBKNTBy7HFb9ej17aJ5nh6u7/9U3auImvCMKVMqfd6CLY83 K05fFCkqvqnk/8HORNVg7kXnN242lfvi9Y1dPCdUZ6Ok0XQOzz2ZK+0urbY/3MPW7T5Z0baq fUmaQMs/LtWcqEaxF/yP70rODH25x+XntWvn9mrNEs/R3LXpc63upeqfmy+H1OtrXlivxFKc kWioxVxUnAgAXLb41vMCAAA= DLP-Filter: Pass X-MTR: 20000000000000000@CPGS X-CFilter-Loop: Reflected Sender: linux-samsung-soc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-samsung-soc@vger.kernel.org X-Spam-Status: No, score=-4.8 required=5.0 tests=BAYES_00, DATE_IN_PAST_96_XX, RCVD_IN_DNSWL_HI, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP From: Vikas Sajjan While trying to get rate of "mout_vpllsrc" MUX (parent) for registering the "fout_vpll" (child), we found get rate was failing. So this patch moves the mout_vpllsrc MUX out of the existing common list and registers the mout_vpllsrc MUX before the PLL registrations. Reviewed-by: Tomasz Figa Signed-off-by: Vikas Sajjan Signed-off-by: Yadwinder Singh Brar Reviewed-by: Tomasz Figa --- drivers/clk/samsung/clk-exynos5250.c | 7 ++++++- 1 files changed, 6 insertions(+), 1 deletions(-) diff --git a/drivers/clk/samsung/clk-exynos5250.c b/drivers/clk/samsung/clk-exynos5250.c index 21f5491..6881810 100644 --- a/drivers/clk/samsung/clk-exynos5250.c +++ b/drivers/clk/samsung/clk-exynos5250.c @@ -228,6 +228,10 @@ struct samsung_fixed_factor_clock exynos5250_fixed_factor_clks[] __initdata = { FFACTOR(none, "fout_bplldiv2", "fout_bpll", 1, 2, 0), }; +struct samsung_mux_clock exynos5250_pll_pmux_clks[] __initdata = { + MUX(none, "mout_vpllsrc", mout_vpllsrc_p, SRC_TOP2, 0, 1), +}; + struct samsung_mux_clock exynos5250_mux_clks[] __initdata = { MUX(none, "mout_apll", mout_apll_p, SRC_CPU, 0, 1), MUX(none, "mout_cpu", mout_cpu_p, SRC_CPU, 16, 1), @@ -235,7 +239,6 @@ struct samsung_mux_clock exynos5250_mux_clks[] __initdata = { MUX(none, "sclk_mpll", mout_mpll_p, SRC_CORE1, 8, 1), MUX(none, "mout_bpll_fout", mout_bpll_fout_p, PLL_DIV2_SEL, 0, 1), MUX(none, "sclk_bpll", mout_bpll_p, SRC_CDREX, 0, 1), - MUX(none, "mout_vpllsrc", mout_vpllsrc_p, SRC_TOP2, 0, 1), MUX(none, "sclk_vpll", mout_vpll_p, SRC_TOP2, 16, 1), MUX(none, "sclk_epll", mout_epll_p, SRC_TOP2, 12, 1), MUX(none, "sclk_cpll", mout_cpll_p, SRC_TOP2, 8, 1), @@ -526,6 +529,8 @@ void __init exynos5250_clk_init(struct device_node *np) samsung_clk_of_register_fixed_ext(exynos5250_fixed_rate_ext_clks, ARRAY_SIZE(exynos5250_fixed_rate_ext_clks), ext_clk_match); + samsung_clk_register_mux(exynos5250_pll_pmux_clks, + ARRAY_SIZE(exynos5250_pll_pmux_clks)); samsung_clk_register_pll(exynos5250_plls, ARRAY_SIZE(exynos5250_plls), reg_base); samsung_clk_register_fixed_rate(exynos5250_fixed_rate_clks,