From patchwork Tue Jun 11 12:53:32 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Amit Kachhap X-Patchwork-Id: 2703581 Return-Path: X-Original-To: patchwork-linux-samsung-soc@patchwork.kernel.org Delivered-To: patchwork-process-083081@patchwork2.kernel.org Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by patchwork2.kernel.org (Postfix) with ESMTP id 96AE5DFF68 for ; Tue, 11 Jun 2013 12:58:32 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1755270Ab3FKM6K (ORCPT ); Tue, 11 Jun 2013 08:58:10 -0400 Received: from mail-pa0-f45.google.com ([209.85.220.45]:54162 "EHLO mail-pa0-f45.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1755550Ab3FKMzi (ORCPT ); Tue, 11 Jun 2013 08:55:38 -0400 Received: by mail-pa0-f45.google.com with SMTP id bi5so5468917pad.18 for ; Tue, 11 Jun 2013 05:55:37 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=sender:from:to:cc:subject:date:message-id:x-mailer:in-reply-to :references; bh=kUfYR81PyLYV0GyRbsMKbdC+S3PxChqdt7+lbIRqg8w=; b=rQX++d1VqzCCvjzRLesCmnh2pErlO54moIgR5ZKQ+kgtbDpBjW0fh27c6A/OV+XRaE Pk1nJN7xtnU8WQ/vsSkYwCcEfeAu1+iuN4qVr5qkY0FD14swwGC7dWhMBUcD0BptrfK+ 36gYRVW4kdNxBVWzINe5m+2oQnaiYKFYuQDhAAsrLMNPzBjmeRkimHJ85tT+7x+vjDBM OqZ9sBVOdZFUj1ZKZEveZcGZLbKPKLOPJHOtMJc6X6+tCBZA6oy2/hwp6SycT32KXczJ zerK/XDKYZTOWDaWiEf7MINnn7jY4N/wuT78blyrlCiScRerGfEX2JAwUzCBFf7AW4xd 7kwQ== X-Received: by 10.66.164.161 with SMTP id yr1mr18650797pab.77.1370955337096; Tue, 11 Jun 2013 05:55:37 -0700 (PDT) Received: from localhost.localdomain ([115.113.119.130]) by mx.google.com with ESMTPSA id wi6sm14599807pbc.22.2013.06.11.05.55.33 for (version=TLSv1 cipher=RC4-SHA bits=128/128); Tue, 11 Jun 2013 05:55:36 -0700 (PDT) From: Amit Daniel Kachhap To: linux-pm@vger.kernel.org, Zhang Rui , Eduardo Valentin Cc: linux-samsung-soc@vger.kernel.org, linux-kernel@vger.kernel.org, amit.kachhap@gmail.com, Kukjin Kim , jonghwa3.lee@samsung.com Subject: [PATCH V5 22/30] thermal: exynos: Add support to access common register for multistance Date: Tue, 11 Jun 2013 18:23:32 +0530 Message-Id: <1370955220-2949-23-git-send-email-amit.daniel@samsung.com> X-Mailer: git-send-email 1.7.1 In-Reply-To: <1370955220-2949-1-git-send-email-amit.daniel@samsung.com> References: <1370955220-2949-1-git-send-email-amit.daniel@samsung.com> Sender: linux-samsung-soc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-samsung-soc@vger.kernel.org This patch adds support to parse one more common set of TMU register. First set of register belongs to each instance of TMU and second set belongs to common TMU registers. Acked-by: Kukjin Kim Signed-off-by: Amit Daniel Kachhap --- .../devicetree/bindings/thermal/exynos-thermal.txt | 6 +++++- drivers/thermal/samsung/exynos_tmu.c | 20 ++++++++++++++++++++ 2 files changed, 25 insertions(+), 1 deletions(-) diff --git a/Documentation/devicetree/bindings/thermal/exynos-thermal.txt b/Documentation/devicetree/bindings/thermal/exynos-thermal.txt index 535fd0e..0ea33f7 100644 --- a/Documentation/devicetree/bindings/thermal/exynos-thermal.txt +++ b/Documentation/devicetree/bindings/thermal/exynos-thermal.txt @@ -7,7 +7,11 @@ "samsung,exynos4210-tmu" "samsung,exynos5250-tmu" - interrupt-parent : The phandle for the interrupt controller -- reg : Address range of the thermal registers +- reg : Address range of the thermal registers. For soc's which has multiple + instances of TMU and some registers are shared across all TMU's like + interrupt related then 2 set of register has to supplied. First set + belongs to each instance of TMU and second set belongs to common TMU + registers. - interrupts : Should contain interrupt for thermal system - clocks : The main clock for TMU device - clock-names : Thermal system clock name diff --git a/drivers/thermal/samsung/exynos_tmu.c b/drivers/thermal/samsung/exynos_tmu.c index 877dab8..150a869 100644 --- a/drivers/thermal/samsung/exynos_tmu.c +++ b/drivers/thermal/samsung/exynos_tmu.c @@ -40,6 +40,7 @@ * @id: identifier of the one instance of the TMU controller. * @pdata: pointer to the tmu platform/configuration data * @base: base address of the single instance of the TMU controller. + * @base_common: base address of the common registers of the TMU controller. * @irq: irq number of the TMU controller. * @soc: id of the SOC type. * @irq_work: pointer to the irq work structure. @@ -53,6 +54,7 @@ struct exynos_tmu_data { int id; struct exynos_tmu_platform_data *pdata; void __iomem *base; + void __iomem *base_common; int irq; enum soc_type soc; struct work_struct irq_work; @@ -478,6 +480,24 @@ static int exynos_map_dt_data(struct platform_device *pdev) return -ENODEV; } data->pdata = pdata; + /* + * Check if the TMU shares some registers and then try to map the + * memory of common registers. + */ + if (!TMU_SUPPORTS(pdata, SHARED_MEMORY)) + return 0; + + if (of_address_to_resource(pdev->dev.of_node, 1, &res)) { + dev_err(&pdev->dev, "failed to get Resource 1\n"); + return -ENODEV; + } + + data->base_common = devm_ioremap(&pdev->dev, res.start, + resource_size(&res)); + if (!data->base) { + dev_err(&pdev->dev, "Failed to ioremap memory\n"); + return -ENOMEM; + } return 0; }