| Message ID | 1371466836-4111-10-git-send-email-chander.kashyap@linaro.org (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
diff --git a/arch/arm/mach-exynos/platsmp.c b/arch/arm/mach-exynos/platsmp.c index 85ea4ca..7b4c03e 100644 --- a/arch/arm/mach-exynos/platsmp.c +++ b/arch/arm/mach-exynos/platsmp.c @@ -50,6 +50,8 @@ static inline void __iomem *cpu_boot_reg(int cpu) boot_reg = cpu_boot_reg_base(); if (soc_is_exynos4412()) boot_reg += 4*cpu; + else if (soc_is_exynos5420()) + boot_reg += 4; return boot_reg; }
The location at which the boot address is specified for secondary CPUs of Exynos5420 is SYSRAM base + 4. Update the cpu_boot_reg function accordingly. Signed-off-by: Chander Kashyap <chander.kashyap@linaro.org> --- arch/arm/mach-exynos/platsmp.c | 2 ++ 1 file changed, 2 insertions(+)