From patchwork Tue Jun 18 14:33:14 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Rahul Sharma X-Patchwork-Id: 2742621 Return-Path: X-Original-To: patchwork-linux-samsung-soc@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork1.web.kernel.org (Postfix) with ESMTP id 6A9099F3A0 for ; Tue, 18 Jun 2013 14:09:55 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 8699E2040C for ; Tue, 18 Jun 2013 14:09:53 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id EDF0C20384 for ; Tue, 18 Jun 2013 14:09:50 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S932868Ab3FROJr (ORCPT ); Tue, 18 Jun 2013 10:09:47 -0400 Received: from mailout4.samsung.com ([203.254.224.34]:40263 "EHLO mailout4.samsung.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S932855Ab3FROJq (ORCPT ); Tue, 18 Jun 2013 10:09:46 -0400 Received: from epcpsbgr4.samsung.com (u144.gpu120.samsung.co.kr [203.254.230.144]) by mailout4.samsung.com (Oracle Communications Messaging Server 7u4-24.01 (7.0.4.24.0) 64bit (built Nov 17 2011)) with ESMTP id <0MOL00MGDE09HUL0@mailout4.samsung.com> for linux-samsung-soc@vger.kernel.org; Tue, 18 Jun 2013 23:09:45 +0900 (KST) Received: from epcpsbgm2.samsung.com ( [172.20.52.122]) by epcpsbgr4.samsung.com (EPCPMTA) with SMTP id 88.2A.29708.92A60C15; Tue, 18 Jun 2013 23:09:45 +0900 (KST) X-AuditID: cbfee690-b7f6f6d00000740c-d7-51c06a292d92 Received: from epmmp1.local.host ( [203.254.227.16]) by epcpsbgm2.samsung.com (EPCPMTA) with SMTP id 8E.16.21068.82A60C15; Tue, 18 Jun 2013 23:09:45 +0900 (KST) Received: from chromeserver-PowerEdge-T410.sisodomain.com ([107.108.73.106]) by mmp1.samsung.com (Oracle Communications Messaging Server 7u4-24.01(7.0.4.24.0) 64bit (built Nov 17 2011)) with ESMTPA id <0MOL00G19DZTS050@mmp1.samsung.com>; Tue, 18 Jun 2013 23:09:44 +0900 (KST) From: Rahul Sharma To: linux-samsung-soc@vger.kernel.org, devicetree-discuss@lists.ozlabs.org, dri-devel@lists.freedesktop.org Cc: kgene.kim@samsung.com, sw0312.kim@samsung.com, inki.dae@samsung.com, joshi@samsung.com, r.sh.open@gmail.com, Rahul Sharma Subject: [PATCH 1/5] clk/exynos5420: add sclk_hdmiphy to the list of special clocks Date: Tue, 18 Jun 2013 20:03:14 +0530 Message-id: <1371565998-3642-2-git-send-email-rahul.sharma@samsung.com> X-Mailer: git-send-email 1.7.10.4 In-reply-to: <1371565998-3642-1-git-send-email-rahul.sharma@samsung.com> References: <1371565998-3642-1-git-send-email-rahul.sharma@samsung.com> X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFvrPLMWRmVeSWpSXmKPExsWyRsSkSlcz60Cgwc+33BYHZj9ktbjy9T2b xaT7E1gsvu/6wm7Ru+Aqm8WM8/uYLBa+iLeYsugwq8WMyS/ZHDg9ds66y+5xv/s4k8f5GQsZ Pfq2rGL0+LxJLoA1issmJTUnsyy1SN8ugSvj+Mcd7AWzBCqeHmhha2B8zNvFyMkhIWAi8Wja EkYIW0ziwr31bF2MXBxCAksZJf4/PM4IU3TifisrRGIRo8TsZd+ZQBJCArOZJG59CQGx2QR0 JWYffAbWICKQK9Hwt50FpIFZYBajxPfZZ9hBEsICoRJbL35gBrFZBFQlpu9YA2bzCrhL7Glc zAqxTVGi+9kENhCbU8BD4tz9G6wQy9wlZnb+ZoOo2cQu0TfTBWKOgMS3yYeAlnEAxWUlNh1g hiiRlDi44gbLBEbhBYwMqxhFUwuSC4qT0otM9IoTc4tL89L1kvNzNzECA//0v2cTdjDeO2B9 iDEZaNxEZinR5Hxg5OSVxBsamxlZmJqYGhuZW5qRJqwkzqveYh0oJJCeWJKanZpakFoUX1Sa k1p8iJGJg1OqgdF1zmGBjZwS9j5JW6fuY/ec+nmn+v3P7iyPXMzqd7/cox7v33PsuJlnQuDN 3P3t0z3FZOSOb956O25/688HHyplIw/MuvPQQv2iZJHWhLv1F+LOhu/3kLjg/vVCA2PTzhu3 b+xzzpnlf+Hd6fhgoQun/dtus9zz/XSbdU/xc82dKnda1u7j2OCtxFKckWioxVxUnAgAU4mW O5ICAAA= X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFrrLIsWRmVeSWpSXmKPExsVy+t9jAV3NrAOBBhd2MlkcmP2Q1eLK1/ds FpPuT2Cx+L7rC7tF74KrbBYzzu9jslj4It5iyqLDrBYzJr9kc+D02DnrLrvH/e7jTB7nZyxk 9OjbsorR4/MmuQDWqAZGm4zUxJTUIoXUvOT8lMy8dFsl7+B453hTMwNDXUNLC3MlhbzE3FRb JRefAF23zBygg5QUyhJzSoFCAYnFxUr6dpgmhIa46VrANEbo+oYEwfUYGaCBhDWMGcc/7mAv mCVQ8fRAC1sD42PeLkZODgkBE4kT91tZIWwxiQv31rN1MXJxCAksYpSYvew7E0hCSGA2k8St LyEgNpuArsTsg88YQWwRgVyJhr/tLCANzAKzGCW+zz7DDpIQFgiV2HrxAzOIzSKgKjF9xxow m1fAXWJP42KobYoS3c8msIHYnAIeEufu32CFWOYuMbPzN9sERt4FjAyrGEVTC5ILipPSc430 ihNzi0vz0vWS83M3MYIj65n0DsZVDRaHGAU4GJV4eBPE9gcKsSaWFVfmHmKU4GBWEuFVSDwQ KMSbklhZlVqUH19UmpNafIgxGeiqicxSosn5wKjPK4k3NDYxNzU2tTSxMDGzJE1YSZz3YKt1 oJBAemJJanZqakFqEcwWJg5OqQZG0R/iv35En1n386aw0Z7XtwTsb69MM/+z5/q7+y8dJ7yK n8nxyOS+Nv98u3O/P62alLNiwv0b59bnP6nmnh9le/Azz97fu1PXy2zbyyjE+P55fG9xnv2m 5P1mhqELn91b+ew6S/3/aatW3f3s1fXs7HbxZSkbZnlXhH71XVg+/+WBXR8jHsj9m7ZFiaU4 I9FQi7moOBEA/o/cHvACAAA= DLP-Filter: Pass X-MTR: 20000000000000000@CPGS X-CFilter-Loop: Reflected Sender: linux-samsung-soc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-samsung-soc@vger.kernel.org X-Spam-Status: No, score=-8.1 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_HI, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Add sclk_hdmiphy to the list of exposed clocks. This is required by hdmi driver to change the parent of hdmi clock. Signed-off-by: Rahul Sharma --- Documentation/devicetree/bindings/clock/exynos5420-clock.txt | 1 + drivers/clk/samsung/clk-exynos5420.c | 4 ++-- 2 files changed, 3 insertions(+), 2 deletions(-) diff --git a/Documentation/devicetree/bindings/clock/exynos5420-clock.txt b/Documentation/devicetree/bindings/clock/exynos5420-clock.txt index 9bcc4b1..596a368 100644 --- a/Documentation/devicetree/bindings/clock/exynos5420-clock.txt +++ b/Documentation/devicetree/bindings/clock/exynos5420-clock.txt @@ -59,6 +59,7 @@ clock which they consume. sclk_pwm 155 sclk_gscl_wa 156 sclk_gscl_wb 157 + sclk_hdmiphy 158 [Peripheral Clock Gates] diff --git a/drivers/clk/samsung/clk-exynos5420.c b/drivers/clk/samsung/clk-exynos5420.c index 68a96cb..0945435 100644 --- a/drivers/clk/samsung/clk-exynos5420.c +++ b/drivers/clk/samsung/clk-exynos5420.c @@ -91,7 +91,7 @@ enum exynos5420_clks { sclk_i2s2, sclk_pcm1, sclk_pcm2, sclk_spdif, sclk_hdmi, sclk_pixel, sclk_dp1, sclk_mipi1, sclk_fimd1, sclk_maudio0, sclk_maupcm0, sclk_usbd300, sclk_usbd301, sclk_usbphy300, sclk_usbphy301, sclk_unipro, - sclk_pwm, sclk_gscl_wa, sclk_gscl_wb, + sclk_pwm, sclk_gscl_wa, sclk_gscl_wb, sclk_hdmiphy, /* gate clocks */ aclk66_peric = 256, uart0, uart1, uart2, uart3, i2c0, i2c1, i2c2, i2c3, @@ -268,7 +268,7 @@ struct samsung_fixed_rate_clock exynos5420_fixed_rate_ext_clks[] __initdata = { /* fixed rate clocks generated inside the soc */ struct samsung_fixed_rate_clock exynos5420_fixed_rate_clks[] __initdata = { - FRATE(none, "sclk_hdmiphy", NULL, CLK_IS_ROOT, 24000000), + FRATE(sclk_hdmiphy, "sclk_hdmiphy", NULL, CLK_IS_ROOT, 24000000), FRATE(none, "sclk_pwi", NULL, CLK_IS_ROOT, 24000000), FRATE(none, "sclk_usbh20", NULL, CLK_IS_ROOT, 48000000), FRATE(none, "mphy_refclk_ixtal24", NULL, CLK_IS_ROOT, 48000000),