| Message ID | 1374480750-30962-1-git-send-email-chanho61.park@samsung.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
Hi Chanho, On 22 July 2013 13:42, Chanho Park <chanho61.park@samsung.com> wrote: > The exynos4x12 has different address of GATE_IP_IMAGE reg. We should use > EXYNOS4X12_GATE_IP_IMAGE for g2d gating clocks instead of 4210's reg. > In case of mdma node, We don't use it for any exynos4 chipsets. I think we'll > need to change it to 'none' or leave it on. > > Signed-off-by: Chanho Park <chanho61.park@samsung.com> > Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com> > --- > drivers/clk/samsung/clk-exynos4.c | 4 +++- > 1 file changed, 3 insertions(+), 1 deletion(-) > > diff --git a/drivers/clk/samsung/clk-exynos4.c b/drivers/clk/samsung/clk-exynos4.c > index 1bdb882..6300c9d 100644 > --- a/drivers/clk/samsung/clk-exynos4.c > +++ b/drivers/clk/samsung/clk-exynos4.c > @@ -820,8 +820,10 @@ struct samsung_gate_clock exynos4210_gate_clks[] __initdata = { > struct samsung_gate_clock exynos4x12_gate_clks[] __initdata = { > GATE(audss, "audss", "sclk_epll", E4X12_GATE_IP_MAUDIO, 0, 0, 0), > GATE(mdnie0, "mdnie0", "aclk160", GATE_IP_LCD0, 2, 0, 0), > + GATE(g2d, "g2d", "aclk200", E4X12_GATE_IP_IMAGE, 0, 0, 0), > GATE(rotator, "rotator", "aclk200", E4X12_GATE_IP_IMAGE, 1, 0, 0), > - GATE(mdma2, "mdma2", "aclk200", E4X12_GATE_IP_IMAGE, 2, 0, 0), > + GATE(mdma, "mdma", "aclk200", E4X12_GATE_IP_IMAGE, 2, 0, 0), > + GATE(smmu_g2d, "smmu_g2d", "aclk200", E4X12_GATE_IP_IMAGE, 3, 0, 0), > GATE(smmu_mdma, "smmu_mdma", "aclk200", E4X12_GATE_IP_IMAGE, 5, 0, 0), > GATE(mipi_hsi, "mipi_hsi", "aclk133", GATE_IP_FSYS, 10, 0, 0), > GATE(chipid, "chipid", "aclk100", E4X12_GATE_IP_PERIR, 0, 0, 0), Which kernel version is this patch based on? G2D clocks for 4x12 has already been added by commit 5cd644d837 ("clk: exynos4: Add additional G2D clocks").
> -----Original Message----- > From: Sachin Kamat [mailto:sachin.kamat@linaro.org] > Sent: Monday, July 22, 2013 7:01 PM > To: Chanho Park > Cc: mturquette@linaro.org; kgene.kim@samsung.com; > thomas.abraham@linaro.org; t.figa@samsung.com; linux-arm- > kernel@lists.infradead.org; linux-samsung-soc@vger.kernel.org; Kyungmin > Park > Subject: Re: [PATCH] clk: exynos4: fix g2d/mdma clocks of exynos4x12 > > Hi Chanho, > > On 22 July 2013 13:42, Chanho Park <chanho61.park@samsung.com> wrote: > > The exynos4x12 has different address of GATE_IP_IMAGE reg. We should > > use EXYNOS4X12_GATE_IP_IMAGE for g2d gating clocks instead of 4210's > reg. > > In case of mdma node, We don't use it for any exynos4 chipsets. I > > think we'll need to change it to 'none' or leave it on. > > > > Signed-off-by: Chanho Park <chanho61.park@samsung.com> > > Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com> > > --- > > drivers/clk/samsung/clk-exynos4.c | 4 +++- > > 1 file changed, 3 insertions(+), 1 deletion(-) > > > > diff --git a/drivers/clk/samsung/clk-exynos4.c > > b/drivers/clk/samsung/clk-exynos4.c > > index 1bdb882..6300c9d 100644 > > --- a/drivers/clk/samsung/clk-exynos4.c > > +++ b/drivers/clk/samsung/clk-exynos4.c > > @@ -820,8 +820,10 @@ struct samsung_gate_clock exynos4210_gate_clks[] > > __initdata = { struct samsung_gate_clock exynos4x12_gate_clks[] > __initdata = { > > GATE(audss, "audss", "sclk_epll", E4X12_GATE_IP_MAUDIO, 0, 0, 0), > > GATE(mdnie0, "mdnie0", "aclk160", GATE_IP_LCD0, 2, 0, 0), > > + GATE(g2d, "g2d", "aclk200", E4X12_GATE_IP_IMAGE, 0, 0, 0), > > GATE(rotator, "rotator", "aclk200", E4X12_GATE_IP_IMAGE, 1, 0, > 0), > > - GATE(mdma2, "mdma2", "aclk200", E4X12_GATE_IP_IMAGE, 2, 0, 0), > > + GATE(mdma, "mdma", "aclk200", E4X12_GATE_IP_IMAGE, 2, 0, 0), > > + GATE(smmu_g2d, "smmu_g2d", "aclk200", E4X12_GATE_IP_IMAGE, 3, > > + 0, 0), > > GATE(smmu_mdma, "smmu_mdma", "aclk200", E4X12_GATE_IP_IMAGE, 5, > 0, 0), > > GATE(mipi_hsi, "mipi_hsi", "aclk133", GATE_IP_FSYS, 10, 0, 0), > > GATE(chipid, "chipid", "aclk100", E4X12_GATE_IP_PERIR, 0, 0, > > 0), > > Which kernel version is this patch based on? G2D clocks for 4x12 has > already been added by commit 5cd644d837 ("clk: exynos4: Add additional > G2D clocks"). I think I missed your patch. I'll check it and re-send it without g2d gate clock. Thanks Best Regards, Chanho Park -- To unsubscribe from this list: send the line "unsubscribe linux-samsung-soc" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
diff --git a/drivers/clk/samsung/clk-exynos4.c b/drivers/clk/samsung/clk-exynos4.c index 1bdb882..6300c9d 100644 --- a/drivers/clk/samsung/clk-exynos4.c +++ b/drivers/clk/samsung/clk-exynos4.c @@ -820,8 +820,10 @@ struct samsung_gate_clock exynos4210_gate_clks[] __initdata = { struct samsung_gate_clock exynos4x12_gate_clks[] __initdata = { GATE(audss, "audss", "sclk_epll", E4X12_GATE_IP_MAUDIO, 0, 0, 0), GATE(mdnie0, "mdnie0", "aclk160", GATE_IP_LCD0, 2, 0, 0), + GATE(g2d, "g2d", "aclk200", E4X12_GATE_IP_IMAGE, 0, 0, 0), GATE(rotator, "rotator", "aclk200", E4X12_GATE_IP_IMAGE, 1, 0, 0), - GATE(mdma2, "mdma2", "aclk200", E4X12_GATE_IP_IMAGE, 2, 0, 0), + GATE(mdma, "mdma", "aclk200", E4X12_GATE_IP_IMAGE, 2, 0, 0), + GATE(smmu_g2d, "smmu_g2d", "aclk200", E4X12_GATE_IP_IMAGE, 3, 0, 0), GATE(smmu_mdma, "smmu_mdma", "aclk200", E4X12_GATE_IP_IMAGE, 5, 0, 0), GATE(mipi_hsi, "mipi_hsi", "aclk133", GATE_IP_FSYS, 10, 0, 0), GATE(chipid, "chipid", "aclk100", E4X12_GATE_IP_PERIR, 0, 0, 0),