From patchwork Thu Aug 29 05:40:21 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Rahul Sharma X-Patchwork-Id: 2851141 Return-Path: X-Original-To: patchwork-linux-samsung-soc@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork1.web.kernel.org (Postfix) with ESMTP id 8EA229F9CC for ; Thu, 29 Aug 2013 05:18:55 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 3D9CC20237 for ; Thu, 29 Aug 2013 05:18:53 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 44AF420225 for ; Thu, 29 Aug 2013 05:18:52 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753354Ab3H2FSv (ORCPT ); Thu, 29 Aug 2013 01:18:51 -0400 Received: from mailout1.samsung.com ([203.254.224.24]:8233 "EHLO mailout1.samsung.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752230Ab3H2FSu (ORCPT ); Thu, 29 Aug 2013 01:18:50 -0400 Received: from epcpsbgr3.samsung.com (u143.gpu120.samsung.co.kr [203.254.230.143]) by mailout1.samsung.com (Oracle Communications Messaging Server 7u4-24.01 (7.0.4.24.0) 64bit (built Nov 17 2011)) with ESMTP id <0MSA00LE31D949O0@mailout1.samsung.com>; Thu, 29 Aug 2013 14:18:43 +0900 (KST) Received: from epcpsbgm2.samsung.com ( [172.20.52.126]) by epcpsbgr3.samsung.com (EPCPMTA) with SMTP id 9C.64.22755.3B9DE125; Thu, 29 Aug 2013 14:18:43 +0900 (KST) X-AuditID: cbfee68f-b7f656d0000058e3-19-521ed9b3fd2b Received: from epmmp2 ( [203.254.227.17]) by epcpsbgm2.samsung.com (EPCPMTA) with SMTP id 4D.31.05832.3B9DE125; Thu, 29 Aug 2013 14:18:43 +0900 (KST) Received: from chromeserver-PowerEdge-T410.sisodomain.com ([107.108.73.106]) by mmp2.samsung.com (Oracle Communications Messaging Server 7u4-24.01(7.0.4.24.0) 64bit (built Nov 17 2011)) with ESMTPA id <0MSA005YJ1ET0670@mmp2.samsung.com>; Thu, 29 Aug 2013 14:18:43 +0900 (KST) From: Rahul Sharma To: linux-samsung-soc@vger.kernel.org, devicetree@vger.kernel.org Cc: kgene.kim@samsung.com, sw0312.kim@samsung.com, inki.dae@samsung.com, tomasz.figa@gmail.com, s.nawrocki@samsung.com, joshi@samsung.com, r.sh.open@gmail.com, Rahul Sharma Subject: [PATCH v6 1/7] of/documentation: update with clock information for exynos hdmi subsystem Date: Thu, 29 Aug 2013 11:10:21 +0530 Message-id: <1377754827-31786-2-git-send-email-rahul.sharma@samsung.com> X-Mailer: git-send-email 1.7.10.4 In-reply-to: <1377754827-31786-1-git-send-email-rahul.sharma@samsung.com> References: <1377754827-31786-1-git-send-email-rahul.sharma@samsung.com> X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFvrFLMWRmVeSWpSXmKPExsWyRsSkTnfzTbkgg8cnTC3mHznHajHp/gQW i++7vrBb9C64ymYx4/w+JouFL+Itpiw6zGpx+E07q8WMyS/ZLFbt+sPowOWxc9Zddo++LasY PT5vkgtgjuKySUnNySxLLdK3S+DK2PTzHUvBXcGKWU3b2RsYb/F1MXJySAiYSCzYcYwJwhaT uHBvPRuILSSwlFHi41JBmJq/92+wdzFyAcWnM0qseX6XBcKZzSRxb9ckVpAqNgFdidkHnzGC 2CICjhI75vxjAiliFjjNKLFzbws7SEJYIFnixZHbYCtYBFQl7h1tBIpzcPAKeEgceO0DsU1R ovvZBLASTgFPiZUzTjFDXOQh8XFHHyPITAmBVewS8/+2MkHMEZD4NvkQC8gcCQFZiU0HmCHm SEocXHGDZQKj8AJGhlWMoqkFyQXFSelFxnrFibnFpXnpesn5uZsYgeF++t+z/h2Mdw9YH2JM Bho3kVlKNDkfGC95JfGGxmZGFqYmpsZG5pZmpAkrifOqtVgHCgmkJ5akZqemFqQWxReV5qQW H2Jk4uCUamDk/3Zkj9CfXT76nLMnlv3Jzvy7dON360vHTvOfjwrifc93LWhex7JDZlwZBxLl GnbPLH2VNGv2SY75P7oOyF1TF5GM6PxQX+h4c+a1+7/cnhuZR1fal3suXV4X5WMbYnteJrBi vwq3hT9nm4pfxFWeuMZlHF7PGFfcdLzK7XjbtOZiabRxV4MSS3FGoqEWc1FxIgCe6GIqjQIA AA== X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFrrBIsWRmVeSWpSXmKPExsVy+t9jQd3NN+WCDH4f1LGYf+Qcq8Wk+xNY LL7v+sJu0bvgKpvFjPP7mCwWvoi3mLLoMKvF4TftrBYzJr9ks1i16w+jA5fHzll32T36tqxi 9Pi8SS6AOaqB0SYjNTEltUghNS85PyUzL91WyTs43jne1MzAUNfQ0sJcSSEvMTfVVsnFJ0DX LTMH6BYlhbLEnFKgUEBicbGSvh2mCaEhbroWMI0Rur4hQXA9RgZoIGENY8amn+9YCu4KVsxq 2s7ewHiLr4uRk0NCwETi7/0b7BC2mMSFe+vZuhi5OIQEpjNKrHl+lwXCmc0kcW/XJFaQKjYB XYnZB58xgtgiAo4SO+b8YwIpYhY4zSixc28L2ChhgWSJF0dus4HYLAKqEveONgLFOTh4BTwk Drz2gdimKNH9bAJYCaeAp8TKGaeYQWwhoJKPO/oYJzDyLmBkWMUomlqQXFCclJ5rpFecmFtc mpeul5yfu4kRHE/PpHcwrmqwOMQowMGoxMMb8Vs2SIg1say4MvcQowQHs5II76l9ckFCvCmJ lVWpRfnxRaU5qcWHGJOBjprILCWanA+M9bySeENjE3NTY1NLEwsTM0vShJXEeQ+2WgcKCaQn lqRmp6YWpBbBbGHi4JRqYMxrt18bG6EUmmNd/eGn/dqoTXuMMvdNmDnz6aXHSZvCK/5qdX/3 O/jt2qc8u+NBru6axqvXcvrWzbS4l2jC+miW+U27jxJlZn98rF03LHQ+z+jPet/8H0vn9OxK i3dCAZwaW9y4l8ZcXuxzcO5bu/+vBB60T1nCZWR2UNtvNYPe7iLWTw8UfyqxFGckGmoxFxUn AgDWsCdu6wIAAA== DLP-Filter: Pass X-MTR: 20000000000000000@CPGS X-CFilter-Loop: Reflected Sender: linux-samsung-soc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-samsung-soc@vger.kernel.org X-Spam-Status: No, score=-9.4 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_HI, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Adding information about clocks to the binding documentation for exynos mixer and hdmi. Signed-off-by: Rahul Sharma --- Documentation/devicetree/bindings/video/exynos_hdmi.txt | 15 ++++++++++++++- .../devicetree/bindings/video/exynos_mixer.txt | 4 ++++ 2 files changed, 18 insertions(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/video/exynos_hdmi.txt b/Documentation/devicetree/bindings/video/exynos_hdmi.txt index 323983b..1878418 100644 --- a/Documentation/devicetree/bindings/video/exynos_hdmi.txt +++ b/Documentation/devicetree/bindings/video/exynos_hdmi.txt @@ -12,7 +12,20 @@ Required properties: a) phandle of the gpio controller node. b) pin number within the gpio controller. c) optional flags and pull up/down. - +- clocks: list of clock IDs from SoC clock driver. + a) hdmi: It is required for gate operation on aclk_200_disp1 clock + which clocks the display1 block. + b) sclk_hdmi: Gate of HDMI special clock. + c) sclk_pixel: Pixel special clock, one of the two possible inputs of + HDMI clock mux. + d) sclk_hdmiphy: HDMI PHY clock output, one of two possible inputs of + HDMI clock mux. + e) mout_hdmi: It is required by the driver to switch between the 2 + parents i.e. sclk_pixel and sclk_hdmiphy. If hdmiphy is stable + after configuration, parent is set to sclk_hdmiphy else + sclk_pixel. +- clock-names: aliases as per driver requirements for above clock IDs: + "hdmi", "sclk_hdmi", "sclk_pixel", "sclk_hdmiphy" and "mout_hdmi". Example: hdmi { diff --git a/Documentation/devicetree/bindings/video/exynos_mixer.txt b/Documentation/devicetree/bindings/video/exynos_mixer.txt index 3334b0a..7bfde9c 100644 --- a/Documentation/devicetree/bindings/video/exynos_mixer.txt +++ b/Documentation/devicetree/bindings/video/exynos_mixer.txt @@ -10,6 +10,10 @@ Required properties: - reg: physical base address of the mixer and length of memory mapped region. - interrupts: interrupt number to the cpu. +- clocks: list of clock IDs from SoC clock driver. + a) mixer: Gate of Mixer IP bus clock. + b) sclk_hdmi: HDMI Special clock, one of the two possible inputs of + mixer mux. Example: