From patchwork Fri Aug 30 06:59:31 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Rahul Sharma X-Patchwork-Id: 2851810 Return-Path: X-Original-To: patchwork-linux-samsung-soc@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork1.web.kernel.org (Postfix) with ESMTP id 514D39F2F4 for ; Fri, 30 Aug 2013 06:38:00 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 1027120300 for ; Fri, 30 Aug 2013 06:37:59 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id B5620202F0 for ; Fri, 30 Aug 2013 06:37:57 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1755377Ab3H3Ghz (ORCPT ); Fri, 30 Aug 2013 02:37:55 -0400 Received: from mailout1.samsung.com ([203.254.224.24]:35246 "EHLO mailout1.samsung.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1755151Ab3H3Ghy (ORCPT ); Fri, 30 Aug 2013 02:37:54 -0400 Received: from epcpsbgr3.samsung.com (u143.gpu120.samsung.co.kr [203.254.230.143]) by mailout1.samsung.com (Oracle Communications Messaging Server 7u4-24.01 (7.0.4.24.0) 64bit (built Nov 17 2011)) with ESMTP id <0MSB00L6MZQWWZP0@mailout1.samsung.com> for linux-samsung-soc@vger.kernel.org; Fri, 30 Aug 2013 15:37:53 +0900 (KST) Received: from epcpsbgm1.samsung.com ( [172.20.52.126]) by epcpsbgr3.samsung.com (EPCPMTA) with SMTP id 8F.F5.22755.1CD30225; Fri, 30 Aug 2013 15:37:53 +0900 (KST) X-AuditID: cbfee68f-b7f656d0000058e3-81-52203dc1fe03 Received: from epmmp1.local.host ( [203.254.227.16]) by epcpsbgm1.samsung.com (EPCPMTA) with SMTP id 9E.1A.09055.1CD30225; Fri, 30 Aug 2013 15:37:53 +0900 (KST) Received: from chromeserver-PowerEdge-T410.sisodomain.com ([107.108.73.106]) by mmp1.samsung.com (Oracle Communications Messaging Server 7u4-24.01(7.0.4.24.0) 64bit (built Nov 17 2011)) with ESMTPA id <0MSB00I0NZQPRKZ0@mmp1.samsung.com>; Fri, 30 Aug 2013 15:37:53 +0900 (KST) From: Rahul Sharma To: linux-samsung-soc@vger.kernel.org, dri-devel@lists.freedesktop.org Cc: kgene.kim@samsung.com, sw0312.kim@samsung.com, inki.dae@samsung.com, seanpaul@chromium.org, l.stach@pengutronix.de, tomasz.figa@gmail.com, s.nawrocki@samsung.com, joshi@samsung.com, r.sh.open@gmail.com, Rahul Sharma Subject: [PATCH 4/7] drm/exynos: add support for exynos5420 hdmiphy Date: Fri, 30 Aug 2013 12:29:31 +0530 Message-id: <1377845974-28373-5-git-send-email-rahul.sharma@samsung.com> X-Mailer: git-send-email 1.7.10.4 In-reply-to: <1377845974-28373-1-git-send-email-rahul.sharma@samsung.com> References: <1377845974-28373-1-git-send-email-rahul.sharma@samsung.com> X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFprEIsWRmVeSWpSXmKPExsWyRsSkTvegrUKQwb92GYsrX9+zWUy6P4HF 4vuuL+wWvQuuslk8mHuTyWLG+X1MFgtfxFtMWXSY1eLwm3ZWi7sbzjJazJj8ks1i1a4/jA48 HrMbLrJ47Jx1l93jfvdxJo/+vwYefVtWMXp83iQXwBbFZZOSmpNZllqkb5fAlbHv/lGmgmkO FTP33WNrYPxs2MXIySEhYCJxpfscC4QtJnHh3nq2LkYuDiGBpYwSKw/2scEULf89iR0isYhR 4u6xT1BVs5kkXn2bwARSxSagKzH74DPGLkYODhEBN4lZ/1lBapgF/jBKHPm4hB0kLizgLPFu AStIOYuAqkRv81JGEJtXwENiTfdqqCsUJbqfTQBbzCngKfF64wuweiGgmv4Vs1lAZkoInGKX WLLoPRPEIAGJb5MPsYDMlxCQldh0gBlijqTEwRU3WCYwCi9gZFjFKJpakFxQnJReZKxXnJhb XJqXrpecn7uJERgfp/8969/BePeA9SHGZKBxE5mlRJPzgfGVVxJvaGxmZGFqYmpsZG5pRpqw kjivWot1oJBAemJJanZqakFqUXxRaU5q8SFGJg5OqQbGbItNjk3Xvh7vL/9+eWL2yZPh3ApX NHd8PG6Y9vLS2gT/7ZMjjwU0rni47eHds2yTzod/Kp2a9SRAU9KiwK0q9XD3vO1uh+0tT/3Z GiWuqjJbZOGkzjPcf2cV9US9OSc0e/PZ1ECfXw9bL8n/b7ypxu9ldUYVqEnpUNmKL3ZCF25m bgj+3uKuxFKckWioxVxUnAgAsPBMKKUCAAA= X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFnrPIsWRmVeSWpSXmKPExsVy+t9jAd2DtgpBBke2Clpc+fqezWLS/Qks Ft93fWG36F1wlc3iwdybTBYzzu9jslj4It5iyqLDrBaH37SzWtzdcJbRYsbkl2wWq3b9YXTg 8ZjdcJHFY+esu+we97uPM3n0/zXw6NuyitHj8ya5ALaoBkabjNTElNQihdS85PyUzLx0WyXv 4HjneFMzA0NdQ0sLcyWFvMTcVFslF58AXbfMHKAblRTKEnNKgUIBicXFSvp2mCaEhrjpWsA0 Ruj6hgTB9RgZoIGENYwZ++4fZSqY5lAxc989tgbGz4ZdjJwcEgImEst/T2KHsMUkLtxbz9bF yMUhJLCIUeLusU9QzmwmiVffJjCBVLEJ6ErMPviMsYuRg0NEwE1i1n9WkBpmgT+MEkc+LmEH iQsLOEu8W8AKUs4ioCrR27yUEcTmFfCQWNO9mgVimaJE97MJbCA2p4CnxOuNL8DqhYBq+lfM ZpnAyLuAkWEVo2hqQXJBcVJ6rqFecWJucWleul5yfu4mRnD0PZPawbiyweIQowAHoxIP74Ng +SAh1sSy4srcQ4wSHMxKIrwCugpBQrwpiZVVqUX58UWlOanFhxiTga6ayCwlmpwPTAx5JfGG xibmpsamliYWJmaWpAkrifMeaLUOFBJITyxJzU5NLUgtgtnCxMEp1cDopPqL0UWh94xgWFdH 1rXehaHn9F0cJjEFneap6LD+tMThSDJbm6bqww0dn1PVf8fcEPsgcexo8AuBjZ7ljrO+sc58 80v3STS/abWiyI0SmbJPAc/Vd346ks3MdD3s6R+2Uotthg3eteyXjhyz/j/3z52wZ0pT/qTu lZt+T6L2+tvbcot4ttxXYinOSDTUYi4qTgQA1aGQ2gIDAAA= DLP-Filter: Pass X-MTR: 20000000000000000@CPGS X-CFilter-Loop: Reflected Sender: linux-samsung-soc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-samsung-soc@vger.kernel.org X-Spam-Status: No, score=-9.0 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_HI, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Exynos5420 hdmiphy device is a platform device, unlike predecessor SoCs where it used to be a I2C device. This support is added to the hdmiphy driver. Signed-off-by: Rahul Sharma --- drivers/gpu/drm/exynos/exynos_hdmiphy.c | 224 ++++++++++++++++++++++++++++++- 1 file changed, 221 insertions(+), 3 deletions(-) diff --git a/drivers/gpu/drm/exynos/exynos_hdmiphy.c b/drivers/gpu/drm/exynos/exynos_hdmiphy.c index b1b8a0f..33e89d9 100644 --- a/drivers/gpu/drm/exynos/exynos_hdmiphy.c +++ b/drivers/gpu/drm/exynos/exynos_hdmiphy.c @@ -32,6 +32,7 @@ struct hdmiphy_context { /* hdmiphy resources */ void __iomem *phy_pow_ctrl_reg; + void __iomem *regs; struct hdmiphy_config *confs; unsigned int nr_confs; @@ -48,6 +49,135 @@ struct hdmiphy_drv_data { }; /* list of all required phy config settings */ +static struct hdmiphy_config hdmiphy_5420_configs[] = { + { + .pixel_clock = 25200000, + .conf = { + 0x01, 0x52, 0x3F, 0x55, 0x40, 0x01, 0x00, 0xC8, + 0x82, 0xC8, 0xBD, 0xD8, 0x45, 0xA0, 0xAC, 0x80, + 0x06, 0x80, 0x01, 0x84, 0x05, 0x02, 0x24, 0x66, + 0x54, 0xF4, 0x24, 0x00, 0x00, 0x00, 0x01, 0x80, + }, + }, + { + .pixel_clock = 27000000, + .conf = { + 0x01, 0xD1, 0x22, 0x51, 0x40, 0x08, 0xFC, 0xE0, + 0x98, 0xE8, 0xCB, 0xD8, 0x45, 0xA0, 0xAC, 0x80, + 0x06, 0x80, 0x09, 0x84, 0x05, 0x02, 0x24, 0x66, + 0x54, 0xE4, 0x24, 0x00, 0x00, 0x00, 0x01, 0x80, + }, + }, + { + .pixel_clock = 27027000, + .conf = { + 0x01, 0xD1, 0x2D, 0x72, 0x40, 0x64, 0x12, 0xC8, + 0x43, 0xE8, 0x0E, 0xD9, 0x45, 0xA0, 0xAC, 0x80, + 0x06, 0x80, 0x09, 0x84, 0x05, 0x02, 0x24, 0x66, + 0x54, 0xE3, 0x24, 0x00, 0x00, 0x00, 0x01, 0x80, + }, + }, + { + .pixel_clock = 36000000, + .conf = { + 0x01, 0x51, 0x2D, 0x55, 0x40, 0x40, 0x00, 0xC8, + 0x02, 0xC8, 0x0E, 0xD9, 0x45, 0xA0, 0xAC, 0x80, + 0x08, 0x80, 0x09, 0x84, 0x05, 0x02, 0x24, 0x66, + 0x54, 0xAB, 0x24, 0x00, 0x00, 0x00, 0x01, 0x80, + }, + }, + { + .pixel_clock = 40000000, + .conf = { + 0x01, 0xD1, 0x21, 0x31, 0x40, 0x3C, 0x28, 0xC8, + 0x87, 0xE8, 0xC8, 0xD8, 0x45, 0xA0, 0xAC, 0x80, + 0x08, 0x80, 0x09, 0x84, 0x05, 0x02, 0x24, 0x66, + 0x54, 0x9A, 0x24, 0x00, 0x00, 0x00, 0x01, 0x80, + }, + }, + { + .pixel_clock = 65000000, + .conf = { + 0x01, 0xD1, 0x36, 0x34, 0x40, 0x0C, 0x04, 0xC8, + 0x82, 0xE8, 0x45, 0xD9, 0x45, 0xA0, 0xAC, 0x80, + 0x08, 0x80, 0x09, 0x84, 0x05, 0x02, 0x24, 0x66, + 0x54, 0xBD, 0x24, 0x01, 0x00, 0x00, 0x01, 0x80, + }, + }, + { + .pixel_clock = 71000000, + .conf = { + 0x01, 0xD1, 0x3B, 0x35, 0x40, 0x0C, 0x04, 0xC8, + 0x85, 0xE8, 0x63, 0xD9, 0x45, 0xA0, 0xAC, 0x80, + 0x08, 0x80, 0x09, 0x84, 0x05, 0x02, 0x24, 0x66, + 0x54, 0x57, 0x24, 0x00, 0x00, 0x00, 0x01, 0x80, + }, + }, + { + .pixel_clock = 74176000, + .conf = { + 0x01, 0xD1, 0x1F, 0x10, 0x40, 0x5B, 0xEF, 0xC8, + 0x81, 0xE8, 0xB9, 0xD8, 0x45, 0xA0, 0xAC, 0x80, + 0x56, 0x80, 0x09, 0x84, 0x05, 0x02, 0x24, 0x66, + 0x54, 0xA6, 0x24, 0x01, 0x00, 0x00, 0x01, 0x80, + }, + }, + { + .pixel_clock = 74250000, + .conf = { + 0x01, 0xD1, 0x1F, 0x10, 0x40, 0x40, 0xF8, 0xC8, + 0x81, 0xE8, 0xBA, 0xD8, 0x45, 0xA0, 0xAC, 0x80, + 0x56, 0x80, 0x09, 0x84, 0x05, 0x02, 0x24, 0x66, + 0x54, 0xA5, 0x24, 0x01, 0x00, 0x00, 0x01, 0x80, + }, + }, + { + .pixel_clock = 83500000, + .conf = { + 0x01, 0xD1, 0x23, 0x11, 0x40, 0x0C, 0xFB, 0xC8, + 0x85, 0xE8, 0xD1, 0xD8, 0x45, 0xA0, 0xAC, 0x80, + 0x08, 0x80, 0x09, 0x84, 0x05, 0x02, 0x24, 0x66, + 0x54, 0x4A, 0x24, 0x00, 0x00, 0x00, 0x01, 0x80, + }, + }, + { + .pixel_clock = 106500000, + .conf = { + 0x01, 0xD1, 0x2C, 0x12, 0x40, 0x0C, 0x09, 0xC8, + 0x84, 0xE8, 0x0A, 0xD9, 0x45, 0xA0, 0xAC, 0x80, + 0x08, 0x80, 0x09, 0x84, 0x05, 0x02, 0x24, 0x66, + 0x54, 0x73, 0x24, 0x01, 0x00, 0x00, 0x01, 0x80, + }, + }, + { + .pixel_clock = 108000000, + .conf = { + 0x01, 0x51, 0x2D, 0x15, 0x40, 0x01, 0x00, 0xC8, + 0x82, 0xC8, 0x0E, 0xD9, 0x45, 0xA0, 0xAC, 0x80, + 0x08, 0x80, 0x09, 0x84, 0x05, 0x02, 0x24, 0x66, + 0x54, 0xC7, 0x25, 0x03, 0x00, 0x00, 0x01, 0x80, + }, + }, + { + .pixel_clock = 146250000, + .conf = { + 0x01, 0xD1, 0x3D, 0x15, 0x40, 0x18, 0xFD, 0xC8, + 0x83, 0xE8, 0x6E, 0xD9, 0x45, 0xA0, 0xAC, 0x80, + 0x08, 0x80, 0x09, 0x84, 0x05, 0x02, 0x24, 0x66, + 0x54, 0x54, 0x24, 0x01, 0x00, 0x00, 0x01, 0x80, + }, + }, + { + .pixel_clock = 148500000, + .conf = { + 0x01, 0xD1, 0x1F, 0x00, 0x40, 0x40, 0xF8, 0xC8, + 0x81, 0xE8, 0xBA, 0xD8, 0x45, 0xA0, 0xAC, 0x80, + 0x66, 0x80, 0x09, 0x84, 0x05, 0x02, 0x24, 0x66, + 0x54, 0x4B, 0x25, 0x03, 0x00, 0x00, 0x01, 0x80, + }, + }, +}; + static struct hdmiphy_config hdmiphy_4212_configs[] = { { .pixel_clock = 25200000, @@ -290,7 +420,8 @@ static int hdmiphy_reg_writeb(struct hdmiphy_context *hdata, return 0; return ret; } else { - return -EINVAL; + writeb(value, hdata->regs + (reg_offset<<2)); + return 0; } } @@ -309,7 +440,11 @@ static int hdmiphy_reg_write_buf(struct hdmiphy_context *hdata, return 0; return ret; } else { - return -EINVAL; + int i; + for (i = 0; i < len; i++) + writeb(buf[i], hdata->regs + + ((reg_offset + i)<<2)); + return 0; } } @@ -457,6 +592,11 @@ int exynos_hdmiphy_conf_apply(struct device *dev) return 0; } +static struct hdmiphy_drv_data exynos5420_hdmiphy_drv_data = { + .confs = hdmiphy_5420_configs, + .count = ARRAY_SIZE(hdmiphy_5420_configs) +}; + static struct hdmiphy_drv_data exynos4212_hdmiphy_drv_data = { .confs = hdmiphy_4212_configs, .count = ARRAY_SIZE(hdmiphy_4212_configs) @@ -482,6 +622,67 @@ static struct of_device_id hdmiphy_i2c_device_match_types[] = { } }; +static struct of_device_id hdmiphy_platform_device_match_types[] = { + { + .compatible = "samsung,exynos5420-hdmiphy", + .data = &exynos5420_hdmiphy_drv_data, + }, { + /* end node */ + } +}; + +static int hdmiphy_platform_device_probe(struct platform_device *pdev) +{ + struct device *dev = &pdev->dev; + struct hdmiphy_context *hdata; + struct hdmiphy_drv_data *drv; + struct resource *res; + const struct of_device_id *match; + int ret; + + DRM_DEBUG_KMS("[%d]\n", __LINE__); + + hdata = devm_kzalloc(dev, sizeof(*hdata), GFP_KERNEL); + if (!hdata) { + DRM_ERROR("failed to allocate hdmiphy context.\n"); + return -ENOMEM; + } + + match = of_match_node(of_match_ptr( + hdmiphy_platform_device_match_types), + dev->of_node); + + if (match == NULL) + return -ENODEV; + + drv = (struct hdmiphy_drv_data *)match->data; + + res = platform_get_resource(pdev, IORESOURCE_MEM, 0); + if (!res) { + DRM_ERROR("failed to find phy registers\n"); + return -ENOENT; + } + + hdata->regs = devm_request_and_ioremap(&pdev->dev, res); + if (!hdata->regs) { + DRM_ERROR("failed to map registers\n"); + return -ENXIO; + } + + hdata->dev = dev; + hdata->confs = drv->confs; + hdata->nr_confs = drv->count; + + platform_set_drvdata(pdev, hdata); + ret = hdmiphy_dt_parse_power_control(hdata); + if (ret) { + DRM_ERROR("failed to map hdmiphy pow control reg.\n"); + return ret; + } + + return 0; +} + static int hdmiphy_i2c_device_probe(struct i2c_client *client, const struct i2c_device_id *id) { @@ -538,18 +739,35 @@ struct i2c_driver hdmiphy_i2c_driver = { .command = NULL, }; +struct platform_driver hdmiphy_platform_driver = { + .driver = { + .name = "exynos-hdmiphy", + .owner = THIS_MODULE, + .of_match_table = of_match_ptr( + hdmiphy_platform_device_match_types), + }, + .probe = hdmiphy_platform_device_probe, +}; + int exynos_hdmiphy_driver_register(void) { int ret; ret = i2c_add_driver(&hdmiphy_i2c_driver); if (ret) - return ret; + goto err; + + ret = platform_driver_register(&hdmiphy_platform_driver); + if (ret) + goto err; return 0; +err: + return ret; } void exynos_hdmiphy_driver_unregister(void) { i2c_del_driver(&hdmiphy_i2c_driver); + platform_driver_unregister(&hdmiphy_platform_driver); }