From patchwork Thu Sep 5 12:36:20 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andrzej Hajda X-Patchwork-Id: 2854083 Return-Path: X-Original-To: patchwork-linux-samsung-soc@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork1.web.kernel.org (Postfix) with ESMTP id B68709F3DC for ; Thu, 5 Sep 2013 12:37:40 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 09A1F20452 for ; Thu, 5 Sep 2013 12:37:39 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id AE1862040F for ; Thu, 5 Sep 2013 12:37:36 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1757780Ab3IEMh1 (ORCPT ); Thu, 5 Sep 2013 08:37:27 -0400 Received: from mailout2.w1.samsung.com ([210.118.77.12]:50084 "EHLO mailout2.w1.samsung.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1759680Ab3IEMhZ (ORCPT ); Thu, 5 Sep 2013 08:37:25 -0400 Received: from eucpsbgm1.samsung.com (unknown [203.254.199.244]) by mailout2.w1.samsung.com (Oracle Communications Messaging Server 7u4-24.01(7.0.4.24.0) 64bit (built Nov 17 2011)) with ESMTP id <0MSN00KDJKE1ZW60@mailout2.w1.samsung.com> for linux-samsung-soc@vger.kernel.org; Thu, 05 Sep 2013 13:37:23 +0100 (BST) X-AuditID: cbfec7f4-b7f0a6d000007b1b-7a-52287b02e9bc Received: from eusync4.samsung.com ( [203.254.199.214]) by eucpsbgm1.samsung.com (EUCPMTA) with SMTP id 50.17.31515.20B78225; Thu, 05 Sep 2013 13:37:22 +0100 (BST) Received: from AMDC1061.digital.local ([106.116.147.88]) by eusync4.samsung.com (Oracle Communications Messaging Server 7u4-24.01 (7.0.4.24.0) 64bit (built Nov 17 2011)) with ESMTPA id <0MSN001B7KDXF650@eusync4.samsung.com>; Thu, 05 Sep 2013 13:37:22 +0100 (BST) From: Andrzej Hajda To: linux-arm-kernel@lists.infradead.org Cc: Andrzej Hajda , Kukjin Kim , Mike Turquette , Kyungmin Park , devicetree-discuss@lists.ozlabs.org (moderated list:OPEN FIRMWARE AND...), linux-samsung-soc@vger.kernel.org (moderated list:ARM/S5P EXYNOS AR...) Subject: [PATCH 02/12] ARM: dts: exynos4: convert magic numbers to macros in clock bindings Date: Thu, 05 Sep 2013 14:36:20 +0200 Message-id: <1378384594-4807-3-git-send-email-a.hajda@samsung.com> X-Mailer: git-send-email 1.8.1.2 In-reply-to: <1378384594-4807-1-git-send-email-a.hajda@samsung.com> References: <1378384594-4807-1-git-send-email-a.hajda@samsung.com> X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFvrGJMWRmVeSWpSXmKPExsVy+t/xa7pM1RpBBrvvW1ncWneO1eLA7Ies Fr0LrrJZnG16w26x6fE1VosZ5/cxWTydcJHNgd3jzrU9bB6bl9R7nJ+xkNGjb8sqRo/Pm+QC WKO4bFJSczLLUov07RK4Mq429zIV3JrKWPHi4DHGBsbVyV2MnBwSAiYSZ078ZIOwxSQu3FsP ZHNxCAksZZS42feEFcLpY5LYP/EqC0gVm4CmxN/NN8E6RAQ0JKZ0PWYHsZkFdjFJHDzCBGIL C8RKvGs+xQpiswioSrzb180MYvMKOEm8W36GFWKbgsTPyyfA5nAKOEvcmfkELC4EVDN39zvG CYy8CxgZVjGKppYmFxQnpeca6hUn5haX5qXrJefnbmKEhNWXHYyLj1kdYhTgYFTi4W0wVg8S Yk0sK67MPcQowcGsJMLLlKYRJMSbklhZlVqUH19UmpNafIiRiYNTqoExr8yQ9f97a7+qZJ2A t7Yys83LNy9+N0GU75JE4BOGk2dYlCeffdLtMePV8SM/W9cyKP1Mn752Eq/mapMJBSdnbpwZ xLfRZq8CD6/67g2nPVi87FTsAsRPJpXZeyjcmtoy7/wk6ZhXXyTqElZJlby0+TBL09SJRflm xL9NSzPEnrqxaM+bEj9JiaU4I9FQi7moOBEA21RZQAkCAAA= Sender: linux-samsung-soc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-samsung-soc@vger.kernel.org X-Spam-Status: No, score=-9.3 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_HI, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP The patch replaces magic numbers with macros defined in DT header in exynos4 clock bindings. Signed-off-by: Andrzej Hajda Signed-off-by: Kyungmin Park --- .../devicetree/bindings/clock/exynos4-clock.txt | 259 +-------------------- arch/arm/boot/dts/exynos4.dtsi | 55 ++--- arch/arm/boot/dts/exynos4210.dtsi | 6 +- arch/arm/boot/dts/exynos4412.dtsi | 2 +- arch/arm/boot/dts/exynos4x12.dtsi | 2 +- 5 files changed, 39 insertions(+), 285 deletions(-) diff --git a/Documentation/devicetree/bindings/clock/exynos4-clock.txt b/Documentation/devicetree/bindings/clock/exynos4-clock.txt index c6bf8a6..e30c31e 100644 --- a/Documentation/devicetree/bindings/clock/exynos4-clock.txt +++ b/Documentation/devicetree/bindings/clock/exynos4-clock.txt @@ -15,259 +15,12 @@ Required Properties: - #clock-cells: should be 1. -The following is the list of clocks generated by the controller. Each clock is -assigned an identifier and client nodes use this identifier to specify the -clock which they consume. Some of the clocks are available only on a particular -Exynos4 SoC and this is specified where applicable. - - - [Core Clocks] - - Clock ID SoC (if specific) - ----------------------------------------------- - - xxti 1 - xusbxti 2 - fin_pll 3 - fout_apll 4 - fout_mpll 5 - fout_epll 6 - fout_vpll 7 - sclk_apll 8 - sclk_mpll 9 - sclk_epll 10 - sclk_vpll 11 - arm_clk 12 - aclk200 13 - aclk100 14 - aclk160 15 - aclk133 16 - mout_mpll_user_t 17 Exynos4x12 - mout_mpll_user_c 18 Exynos4x12 - mout_core 19 - mout_apll 20 - - - [Clock Gate for Special Clocks] - - Clock ID SoC (if specific) - ----------------------------------------------- - - sclk_fimc0 128 - sclk_fimc1 129 - sclk_fimc2 130 - sclk_fimc3 131 - sclk_cam0 132 - sclk_cam1 133 - sclk_csis0 134 - sclk_csis1 135 - sclk_hdmi 136 - sclk_mixer 137 - sclk_dac 138 - sclk_pixel 139 - sclk_fimd0 140 - sclk_mdnie0 141 Exynos4412 - sclk_mdnie_pwm0 12 142 Exynos4412 - sclk_mipi0 143 - sclk_audio0 144 - sclk_mmc0 145 - sclk_mmc1 146 - sclk_mmc2 147 - sclk_mmc3 148 - sclk_mmc4 149 - sclk_sata 150 Exynos4210 - sclk_uart0 151 - sclk_uart1 152 - sclk_uart2 153 - sclk_uart3 154 - sclk_uart4 155 - sclk_audio1 156 - sclk_audio2 157 - sclk_spdif 158 - sclk_spi0 159 - sclk_spi1 160 - sclk_spi2 161 - sclk_slimbus 162 - sclk_fimd1 163 Exynos4210 - sclk_mipi1 164 Exynos4210 - sclk_pcm1 165 - sclk_pcm2 166 - sclk_i2s1 167 - sclk_i2s2 168 - sclk_mipihsi 169 Exynos4412 - sclk_mfc 170 - sclk_pcm0 171 - sclk_g3d 172 - sclk_pwm_isp 173 Exynos4x12 - sclk_spi0_isp 174 Exynos4x12 - sclk_spi1_isp 175 Exynos4x12 - sclk_uart_isp 176 Exynos4x12 - sclk_fimg2d 177 - - [Peripheral Clock Gates] - - Clock ID SoC (if specific) - ----------------------------------------------- - - fimc0 256 - fimc1 257 - fimc2 258 - fimc3 259 - csis0 260 - csis1 261 - jpeg 262 - smmu_fimc0 263 - smmu_fimc1 264 - smmu_fimc2 265 - smmu_fimc3 266 - smmu_jpeg 267 - vp 268 - mixer 269 - tvenc 270 Exynos4210 - hdmi 271 - smmu_tv 272 - mfc 273 - smmu_mfcl 274 - smmu_mfcr 275 - g3d 276 - g2d 277 - rotator 278 Exynos4210 - mdma 279 Exynos4210 - smmu_g2d 280 Exynos4210 - smmu_rotator 281 Exynos4210 - smmu_mdma 282 Exynos4210 - fimd0 283 - mie0 284 - mdnie0 285 Exynos4412 - dsim0 286 - smmu_fimd0 287 - fimd1 288 Exynos4210 - mie1 289 Exynos4210 - dsim1 290 Exynos4210 - smmu_fimd1 291 Exynos4210 - pdma0 292 - pdma1 293 - pcie_phy 294 - sata_phy 295 Exynos4210 - tsi 296 - sdmmc0 297 - sdmmc1 298 - sdmmc2 299 - sdmmc3 300 - sdmmc4 301 - sata 302 Exynos4210 - sromc 303 - usb_host 304 - usb_device 305 - pcie 306 - onenand 307 - nfcon 308 - smmu_pcie 309 - gps 310 - smmu_gps 311 - uart0 312 - uart1 313 - uart2 314 - uart3 315 - uart4 316 - i2c0 317 - i2c1 318 - i2c2 319 - i2c3 320 - i2c4 321 - i2c5 322 - i2c6 323 - i2c7 324 - i2c_hdmi 325 - tsadc 326 - spi0 327 - spi1 328 - spi2 329 - i2s1 330 - i2s2 331 - pcm0 332 - i2s0 333 - pcm1 334 - pcm2 335 - pwm 336 - slimbus 337 - spdif 338 - ac97 339 - modemif 340 - chipid 341 - sysreg 342 - hdmi_cec 343 - mct 344 - wdt 345 - rtc 346 - keyif 347 - audss 348 - mipi_hsi 349 Exynos4210 - mdma2 350 Exynos4210 - pixelasyncm0 351 - pixelasyncm1 352 - fimc_lite0 353 Exynos4x12 - fimc_lite1 354 Exynos4x12 - ppmuispx 355 Exynos4x12 - ppmuispmx 356 Exynos4x12 - fimc_isp 357 Exynos4x12 - fimc_drc 358 Exynos4x12 - fimc_fd 359 Exynos4x12 - mcuisp 360 Exynos4x12 - gicisp 361 Exynos4x12 - smmu_isp 362 Exynos4x12 - smmu_drc 363 Exynos4x12 - smmu_fd 364 Exynos4x12 - smmu_lite0 365 Exynos4x12 - smmu_lite1 366 Exynos4x12 - mcuctl_isp 367 Exynos4x12 - mpwm_isp 368 Exynos4x12 - i2c0_isp 369 Exynos4x12 - i2c1_isp 370 Exynos4x12 - mtcadc_isp 371 Exynos4x12 - pwm_isp 372 Exynos4x12 - wdt_isp 373 Exynos4x12 - uart_isp 374 Exynos4x12 - asyncaxim 375 Exynos4x12 - smmu_ispcx 376 Exynos4x12 - spi0_isp 377 Exynos4x12 - spi1_isp 378 Exynos4x12 - pwm_isp_sclk 379 Exynos4x12 - spi0_isp_sclk 380 Exynos4x12 - spi1_isp_sclk 381 Exynos4x12 - uart_isp_sclk 382 Exynos4x12 - tmu_apbif 383 - - [Mux Clocks] - - Clock ID SoC (if specific) - ----------------------------------------------- - - mout_fimc0 384 - mout_fimc1 385 - mout_fimc2 386 - mout_fimc3 387 - mout_cam0 388 - mout_cam1 389 - mout_csis0 390 - mout_csis1 391 - mout_g3d0 392 - mout_g3d1 393 - mout_g3d 394 - aclk400_mcuisp 395 Exynos4x12 - - [Div Clocks] - - Clock ID SoC (if specific) - ----------------------------------------------- - - div_isp0 450 Exynos4x12 - div_isp1 451 Exynos4x12 - div_mcuisp0 452 Exynos4x12 - div_mcuisp1 453 Exynos4x12 - div_aclk200 454 Exynos4x12 - div_aclk400_mcuisp 455 Exynos4x12 +Each clock is assigned an identifier and client nodes can use this identifier +to specify the clock which they consume. +All available clocks are defined as preprocessor macros in +dt-bindings/clock/exynos4.h header and can be used in device +tree sources. Example 1: An example of a clock controller node is listed below. @@ -285,6 +38,6 @@ Example 2: UART controller node that consumes the clock generated by the clock compatible = "samsung,exynos4210-uart"; reg = <0x13820000 0x100>; interrupts = <0 54 0>; - clocks = <&clock 314>, <&clock 153>; + clocks = <&clock CLK_UART2>, <&clock CLK_SCLK_UART2>; clock-names = "uart", "clk_uart_baud0"; }; diff --git a/arch/arm/boot/dts/exynos4.dtsi b/arch/arm/boot/dts/exynos4.dtsi index 3f94fe8..07b2b44 100644 --- a/arch/arm/boot/dts/exynos4.dtsi +++ b/arch/arm/boot/dts/exynos4.dtsi @@ -19,6 +19,7 @@ * published by the Free Software Foundation. */ +#include #include "skeleton.dtsi" / { @@ -96,7 +97,7 @@ compatible = "samsung,s3c2410-wdt"; reg = <0x10060000 0x100>; interrupts = <0 43 0>; - clocks = <&clock 345>; + clocks = <&clock CLK_WDT>; clock-names = "watchdog"; status = "disabled"; }; @@ -105,7 +106,7 @@ compatible = "samsung,s3c6410-rtc"; reg = <0x10070000 0x100>; interrupts = <0 44 0>, <0 45 0>; - clocks = <&clock 346>; + clocks = <&clock CLK_RTC>; clock-names = "rtc"; status = "disabled"; }; @@ -114,7 +115,7 @@ compatible = "samsung,s5pv210-keypad"; reg = <0x100A0000 0x100>; interrupts = <0 109 0>; - clocks = <&clock 347>; + clocks = <&clock CLK_KEYIF>; clock-names = "keypad"; status = "disabled"; }; @@ -123,7 +124,7 @@ compatible = "samsung,exynos4210-sdhci"; reg = <0x12510000 0x100>; interrupts = <0 73 0>; - clocks = <&clock 297>, <&clock 145>; + clocks = <&clock CLK_SDMMC0>, <&clock CLK_SCLK_MMC0>; clock-names = "hsmmc", "mmc_busclk.2"; status = "disabled"; }; @@ -132,7 +133,7 @@ compatible = "samsung,exynos4210-sdhci"; reg = <0x12520000 0x100>; interrupts = <0 74 0>; - clocks = <&clock 298>, <&clock 146>; + clocks = <&clock CLK_SDMMC1>, <&clock CLK_SCLK_MMC1>; clock-names = "hsmmc", "mmc_busclk.2"; status = "disabled"; }; @@ -141,7 +142,7 @@ compatible = "samsung,exynos4210-sdhci"; reg = <0x12530000 0x100>; interrupts = <0 75 0>; - clocks = <&clock 299>, <&clock 147>; + clocks = <&clock CLK_SDMMC2>, <&clock CLK_SCLK_MMC2>; clock-names = "hsmmc", "mmc_busclk.2"; status = "disabled"; }; @@ -150,7 +151,7 @@ compatible = "samsung,exynos4210-sdhci"; reg = <0x12540000 0x100>; interrupts = <0 76 0>; - clocks = <&clock 300>, <&clock 148>; + clocks = <&clock CLK_SDMMC3>, <&clock CLK_SCLK_MMC3>; clock-names = "hsmmc", "mmc_busclk.2"; status = "disabled"; }; @@ -160,7 +161,7 @@ reg = <0x13400000 0x10000>; interrupts = <0 94 0>; samsung,power-domain = <&pd_mfc>; - clocks = <&clock 170>, <&clock 273>; + clocks = <&clock CLK_SCLK_MFC>, <&clock CLK_MFC>; clock-names = "sclk_mfc", "mfc"; status = "disabled"; }; @@ -169,7 +170,7 @@ compatible = "samsung,exynos4210-uart"; reg = <0x13800000 0x100>; interrupts = <0 52 0>; - clocks = <&clock 312>, <&clock 151>; + clocks = <&clock CLK_UART0>, <&clock CLK_SCLK_UART0>; clock-names = "uart", "clk_uart_baud0"; status = "disabled"; }; @@ -178,7 +179,7 @@ compatible = "samsung,exynos4210-uart"; reg = <0x13810000 0x100>; interrupts = <0 53 0>; - clocks = <&clock 313>, <&clock 152>; + clocks = <&clock CLK_UART1>, <&clock CLK_SCLK_UART1>; clock-names = "uart", "clk_uart_baud0"; status = "disabled"; }; @@ -187,7 +188,7 @@ compatible = "samsung,exynos4210-uart"; reg = <0x13820000 0x100>; interrupts = <0 54 0>; - clocks = <&clock 314>, <&clock 153>; + clocks = <&clock CLK_UART2>, <&clock CLK_SCLK_UART2>; clock-names = "uart", "clk_uart_baud0"; status = "disabled"; }; @@ -196,7 +197,7 @@ compatible = "samsung,exynos4210-uart"; reg = <0x13830000 0x100>; interrupts = <0 55 0>; - clocks = <&clock 315>, <&clock 154>; + clocks = <&clock CLK_UART3>, <&clock CLK_SCLK_UART3>; clock-names = "uart", "clk_uart_baud0"; status = "disabled"; }; @@ -207,7 +208,7 @@ compatible = "samsung,s3c2440-i2c"; reg = <0x13860000 0x100>; interrupts = <0 58 0>; - clocks = <&clock 317>; + clocks = <&clock CLK_I2C0>; clock-names = "i2c"; pinctrl-names = "default"; pinctrl-0 = <&i2c0_bus>; @@ -220,7 +221,7 @@ compatible = "samsung,s3c2440-i2c"; reg = <0x13870000 0x100>; interrupts = <0 59 0>; - clocks = <&clock 318>; + clocks = <&clock CLK_I2C1>; clock-names = "i2c"; pinctrl-names = "default"; pinctrl-0 = <&i2c1_bus>; @@ -233,7 +234,7 @@ compatible = "samsung,s3c2440-i2c"; reg = <0x13880000 0x100>; interrupts = <0 60 0>; - clocks = <&clock 319>; + clocks = <&clock CLK_I2C2>; clock-names = "i2c"; status = "disabled"; }; @@ -244,7 +245,7 @@ compatible = "samsung,s3c2440-i2c"; reg = <0x13890000 0x100>; interrupts = <0 61 0>; - clocks = <&clock 320>; + clocks = <&clock CLK_I2C3>; clock-names = "i2c"; status = "disabled"; }; @@ -255,7 +256,7 @@ compatible = "samsung,s3c2440-i2c"; reg = <0x138A0000 0x100>; interrupts = <0 62 0>; - clocks = <&clock 321>; + clocks = <&clock CLK_I2C4>; clock-names = "i2c"; status = "disabled"; }; @@ -266,7 +267,7 @@ compatible = "samsung,s3c2440-i2c"; reg = <0x138B0000 0x100>; interrupts = <0 63 0>; - clocks = <&clock 322>; + clocks = <&clock CLK_I2C5>; clock-names = "i2c"; status = "disabled"; }; @@ -277,7 +278,7 @@ compatible = "samsung,s3c2440-i2c"; reg = <0x138C0000 0x100>; interrupts = <0 64 0>; - clocks = <&clock 323>; + clocks = <&clock CLK_I2C6>; clock-names = "i2c"; status = "disabled"; }; @@ -288,7 +289,7 @@ compatible = "samsung,s3c2440-i2c"; reg = <0x138D0000 0x100>; interrupts = <0 65 0>; - clocks = <&clock 324>; + clocks = <&clock CLK_I2C7>; clock-names = "i2c"; status = "disabled"; }; @@ -301,7 +302,7 @@ rx-dma-channel = <&pdma0 6>; /* preliminary */ #address-cells = <1>; #size-cells = <0>; - clocks = <&clock 327>, <&clock 159>; + clocks = <&clock CLK_SPI0>, <&clock CLK_SCLK_SPI0>; clock-names = "spi", "spi_busclk0"; pinctrl-names = "default"; pinctrl-0 = <&spi0_bus>; @@ -316,7 +317,7 @@ rx-dma-channel = <&pdma1 6>; /* preliminary */ #address-cells = <1>; #size-cells = <0>; - clocks = <&clock 328>, <&clock 160>; + clocks = <&clock CLK_SPI1>, <&clock CLK_SCLK_SPI1>; clock-names = "spi", "spi_busclk0"; pinctrl-names = "default"; pinctrl-0 = <&spi1_bus>; @@ -331,7 +332,7 @@ rx-dma-channel = <&pdma0 8>; /* preliminary */ #address-cells = <1>; #size-cells = <0>; - clocks = <&clock 329>, <&clock 161>; + clocks = <&clock CLK_SPI2>, <&clock CLK_SCLK_SPI2>; clock-names = "spi", "spi_busclk0"; pinctrl-names = "default"; pinctrl-0 = <&spi2_bus>; @@ -357,7 +358,7 @@ compatible = "arm,pl330", "arm,primecell"; reg = <0x12680000 0x1000>; interrupts = <0 35 0>; - clocks = <&clock 292>; + clocks = <&clock CLK_PDMA0>; clock-names = "apb_pclk"; #dma-cells = <1>; #dma-channels = <8>; @@ -368,7 +369,7 @@ compatible = "arm,pl330", "arm,primecell"; reg = <0x12690000 0x1000>; interrupts = <0 36 0>; - clocks = <&clock 293>; + clocks = <&clock CLK_PDMA1>; clock-names = "apb_pclk"; #dma-cells = <1>; #dma-channels = <8>; @@ -379,7 +380,7 @@ compatible = "arm,pl330", "arm,primecell"; reg = <0x12850000 0x1000>; interrupts = <0 34 0>; - clocks = <&clock 279>; + clocks = <&clock CLK_MDMA>; clock-names = "apb_pclk"; #dma-cells = <1>; #dma-channels = <8>; @@ -393,7 +394,7 @@ reg = <0x11c00000 0x20000>; interrupt-names = "fifo", "vsync", "lcd_sys"; interrupts = <11 0>, <11 1>, <11 2>; - clocks = <&clock 140>, <&clock 283>; + clocks = <&clock CLK_SCLK_FIMD0>, <&clock CLK_FIMD0>; clock-names = "sclk_fimd", "fimd"; samsung,power-domain = <&pd_lcd0>; status = "disabled"; diff --git a/arch/arm/boot/dts/exynos4210.dtsi b/arch/arm/boot/dts/exynos4210.dtsi index b7f358a..0b34e87 100644 --- a/arch/arm/boot/dts/exynos4210.dtsi +++ b/arch/arm/boot/dts/exynos4210.dtsi @@ -56,7 +56,7 @@ interrupt-parent = <&mct_map>; interrupts = <0 0>, <1 0>, <2 0>, <3 0>, <4 0>, <5 0>; - clocks = <&clock 3>, <&clock 344>; + clocks = <&clock CLK_FIN_PLL>, <&clock CLK_MCT>; clock-names = "fin_pll", "mct"; mct_map: mct-map { @@ -112,7 +112,7 @@ interrupt-parent = <&combiner>; reg = <0x100C0000 0x100>; interrupts = <2 4>; - clocks = <&clock 383>; + clocks = <&clock CLK_TMU_APBIF>; clock-names = "tmu_apbif"; status = "disabled"; }; @@ -121,7 +121,7 @@ compatible = "samsung,s5pv210-g2d"; reg = <0x12800000 0x1000>; interrupts = <0 89 0>; - clocks = <&clock 177>, <&clock 277>; + clocks = <&clock CLK_SCLK_FIMG2D>, <&clock CLK_G2D>; clock-names = "sclk_fimg2d", "fimg2d"; status = "disabled"; }; diff --git a/arch/arm/boot/dts/exynos4412.dtsi b/arch/arm/boot/dts/exynos4412.dtsi index e743e67..e0bb495 100644 --- a/arch/arm/boot/dts/exynos4412.dtsi +++ b/arch/arm/boot/dts/exynos4412.dtsi @@ -43,7 +43,7 @@ interrupt-parent = <&mct_map>; interrupts = <0 0>, <1 0>, <2 0>, <3 0>, <4 0>, <5 0>, <6 0>, <7 0>; - clocks = <&clock 3>, <&clock 344>; + clocks = <&clock CLK_FIN_PLL>, <&clock CLK_MCT>; clock-names = "fin_pll", "mct"; mct_map: mct-map { diff --git a/arch/arm/boot/dts/exynos4x12.dtsi b/arch/arm/boot/dts/exynos4x12.dtsi index 01da194..8bfa206 100644 --- a/arch/arm/boot/dts/exynos4x12.dtsi +++ b/arch/arm/boot/dts/exynos4x12.dtsi @@ -69,7 +69,7 @@ compatible = "samsung,exynos4212-g2d"; reg = <0x10800000 0x1000>; interrupts = <0 89 0>; - clocks = <&clock 177>, <&clock 277>; + clocks = <&clock CLK_SCLK_FIMG2D>, <&clock CLK_G2D>; clock-names = "sclk_fimg2d", "fimg2d"; status = "disabled"; };