diff mbox

[4/4,v3] ARM: dts: Exynos5420: Add device nodes for TMU blocks

Message ID 1384238268-24671-1-git-send-email-ch.naveen@samsung.com (mailing list archive)
State New, archived
Headers show

Commit Message

Naveen Krishna Chatradhi Nov. 12, 2013, 6:37 a.m. UTC
Exynos5420 SoC has per core thermal management unit.
5 TMU channels 4 for CPUs and 5th for GPU.

This patch adds the device tree nodes to the DT device list.

Nodes carry the misplaced second base address and the second
clock to access the misplaced base address.

Signed-off-by: Leela Krishna Amudala <l.krishna@samsung.com>
Signed-off-by: Naveen Krishna Chatradhi <ch.naveen@samsung.com>
Signed-off-by: Andrew Bresticker <abrestic@chromium.org>
---
Changes since v2:
3. uses the new compatible strings introduced along with adding
   support for Exynso5420.

Changes since v1:
1. Nodes carry the misplaced second base address and the second
   clock to access the misplaced base address.
2. Correct the clock number for the TMU4

 arch/arm/boot/dts/exynos5420.dtsi |   48 +++++++++++++++++++++++++++++++++++++
 1 file changed, 48 insertions(+)

Comments

Naveen Krishna Ch Nov. 18, 2013, 3:22 a.m. UTC | #1
Hello All,

On 12 November 2013 12:07, Naveen Krishna Chatradhi
<ch.naveen@samsung.com> wrote:
> Exynos5420 SoC has per core thermal management unit.
> 5 TMU channels 4 for CPUs and 5th for GPU.
>
> This patch adds the device tree nodes to the DT device list.
>
> Nodes carry the misplaced second base address and the second
> clock to access the misplaced base address.
>
> Signed-off-by: Leela Krishna Amudala <l.krishna@samsung.com>
> Signed-off-by: Naveen Krishna Chatradhi <ch.naveen@samsung.com>
> Signed-off-by: Andrew Bresticker <abrestic@chromium.org>
> ---
> Changes since v2:
> 3. uses the new compatible strings introduced along with adding
>    support for Exynso5420.
>
> Changes since v1:
> 1. Nodes carry the misplaced second base address and the second
>    clock to access the misplaced base address.
> 2. Correct the clock number for the TMU4
>
>  arch/arm/boot/dts/exynos5420.dtsi |   48 +++++++++++++++++++++++++++++++++++++
>  1 file changed, 48 insertions(+)
>
> diff --git a/arch/arm/boot/dts/exynos5420.dtsi b/arch/arm/boot/dts/exynos5420.dtsi
> index 6ffefd1..d736b40 100644
> --- a/arch/arm/boot/dts/exynos5420.dtsi
> +++ b/arch/arm/boot/dts/exynos5420.dtsi
> @@ -369,4 +369,52 @@
>                 clock-names = "gscl";
>                 samsung,power-domain = <&gsc_pd>;
>         };
> +
> +       /* tmu for CPU0 */
> +       tmu@10060000 {
> +               compatible = "samsung,exynos5420-tmu";
> +               reg = <0x10060000 0x100>;
> +               interrupts = <0 65 0>;
> +               clocks = <&clock 318>;
> +               clock-names = "tmu_apbif";
> +       };
> +
> +       /* tmu for CPU1 */
> +       tmu@10064000 {
> +               compatible = "samsung,exynos5420-tmu";
> +               reg = <0x10064000 0x100>;
> +               interrupts = <0 183 0>;
> +               clocks = <&clock 318>;
> +               clock-names = "tmu_apbif";
> +       };
> +
> +       /* tmu for CPU2 */
> +       tmu@10068000 {
> +               compatible = "samsung,exynos5420-tmu-triminfo";
> +               /* 2nd reg is for the misplaced TRIMINFO register */
> +               reg = <0x10068000 0x100>, <0x1006c000 0x4>;
> +               interrupts = <0 184 0>;
> +               clocks = <&clock 318>;
> +               clock-names = "tmu_apbif";
> +       };
> +
> +       /* tmu for CPU3 */
> +       tmu@1006c000 {
> +               compatible = "samsung,exynos5420-tmu-triminfo-clk";
> +               /* 2nd reg is for the misplaced TRIMINFO register */
> +               reg = <0x1006c000 0x100>, <0x100a0000 0x4>;
> +               interrupts = <0 185 0>;
> +               clocks = <&clock 318>, <&clock 319>;
> +               clock-names = "tmu_apbif", "tmu_apbif_triminfo";
> +       };
> +
> +       /* tmu for GPU */
> +       tmu@100a0000 {
> +               compatible = "samsung,exynos5420-tmu-triminfo-clk";
> +               /* 2nd reg is for the misplaced TRIMINFO register */
> +               reg = <0x100a0000 0x100>, <0x10068000 0x4>;
> +               interrupts = <0 215 0>;
> +               clocks = <&clock 319>, <&clock 318>;
> +               clock-names = "tmu_apbif", "tmu_apbif_triminfo";
> +       };
>  };
> --
> 1.7.10.4
Any comments on this patch
>
Tomasz Figa Dec. 9, 2013, 12:57 p.m. UTC | #2
Hi Naveen,

On Tuesday 12 of November 2013 12:07:48 Naveen Krishna Chatradhi wrote:
> Exynos5420 SoC has per core thermal management unit.
> 5 TMU channels 4 for CPUs and 5th for GPU.
> 
> This patch adds the device tree nodes to the DT device list.
> 
> Nodes carry the misplaced second base address and the second
> clock to access the misplaced base address.
> 
> Signed-off-by: Leela Krishna Amudala <l.krishna@samsung.com>
> Signed-off-by: Naveen Krishna Chatradhi <ch.naveen@samsung.com>
> Signed-off-by: Andrew Bresticker <abrestic@chromium.org>
> ---
> Changes since v2:
> 3. uses the new compatible strings introduced along with adding
>    support for Exynso5420.
> 
> Changes since v1:
> 1. Nodes carry the misplaced second base address and the second
>    clock to access the misplaced base address.
> 2. Correct the clock number for the TMU4
> 
>  arch/arm/boot/dts/exynos5420.dtsi |   48 +++++++++++++++++++++++++++++++++++++
>  1 file changed, 48 insertions(+)

In addition to updating to reflect my comments to patch 3/4, please also
see my comments inline.

> diff --git a/arch/arm/boot/dts/exynos5420.dtsi b/arch/arm/boot/dts/exynos5420.dtsi
> index 6ffefd1..d736b40 100644
> --- a/arch/arm/boot/dts/exynos5420.dtsi
> +++ b/arch/arm/boot/dts/exynos5420.dtsi
> @@ -369,4 +369,52 @@
>  		clock-names = "gscl";
>  		samsung,power-domain = <&gsc_pd>;
>  	};
> +
> +	/* tmu for CPU0 */
> +	tmu@10060000 {

Instead of the comment, it might be better to add a label to the node,
such as

tmu_cpu0: tmu@10060000 {

for TMU of CPU0 and so on.

> +		compatible = "samsung,exynos5420-tmu";
> +		reg = <0x10060000 0x100>;
> +		interrupts = <0 65 0>;
> +		clocks = <&clock 318>;
> +		clock-names = "tmu_apbif";
> +	};
> +
> +	/* tmu for CPU1 */
> +	tmu@10064000 {
> +		compatible = "samsung,exynos5420-tmu";
> +		reg = <0x10064000 0x100>;
> +		interrupts = <0 183 0>;
> +		clocks = <&clock 318>;
> +		clock-names = "tmu_apbif";
> +	};
> +
> +	/* tmu for CPU2 */
> +	tmu@10068000 {
> +		compatible = "samsung,exynos5420-tmu-triminfo";
> +		/* 2nd reg is for the misplaced TRIMINFO register */

Hmm, I'm not convinced about usefulness of this comment. Used compatible
value directly implies the meaning of all reg entries.

Best regards,
Tomasz

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diff mbox

Patch

diff --git a/arch/arm/boot/dts/exynos5420.dtsi b/arch/arm/boot/dts/exynos5420.dtsi
index 6ffefd1..d736b40 100644
--- a/arch/arm/boot/dts/exynos5420.dtsi
+++ b/arch/arm/boot/dts/exynos5420.dtsi
@@ -369,4 +369,52 @@ 
 		clock-names = "gscl";
 		samsung,power-domain = <&gsc_pd>;
 	};
+
+	/* tmu for CPU0 */
+	tmu@10060000 {
+		compatible = "samsung,exynos5420-tmu";
+		reg = <0x10060000 0x100>;
+		interrupts = <0 65 0>;
+		clocks = <&clock 318>;
+		clock-names = "tmu_apbif";
+	};
+
+	/* tmu for CPU1 */
+	tmu@10064000 {
+		compatible = "samsung,exynos5420-tmu";
+		reg = <0x10064000 0x100>;
+		interrupts = <0 183 0>;
+		clocks = <&clock 318>;
+		clock-names = "tmu_apbif";
+	};
+
+	/* tmu for CPU2 */
+	tmu@10068000 {
+		compatible = "samsung,exynos5420-tmu-triminfo";
+		/* 2nd reg is for the misplaced TRIMINFO register */
+		reg = <0x10068000 0x100>, <0x1006c000 0x4>;
+		interrupts = <0 184 0>;
+		clocks = <&clock 318>;
+		clock-names = "tmu_apbif";
+	};
+
+	/* tmu for CPU3 */
+	tmu@1006c000 {
+		compatible = "samsung,exynos5420-tmu-triminfo-clk";
+		/* 2nd reg is for the misplaced TRIMINFO register */
+		reg = <0x1006c000 0x100>, <0x100a0000 0x4>;
+		interrupts = <0 185 0>;
+		clocks = <&clock 318>, <&clock 319>;
+		clock-names = "tmu_apbif", "tmu_apbif_triminfo";
+	};
+
+	/* tmu for GPU */
+	tmu@100a0000 {
+		compatible = "samsung,exynos5420-tmu-triminfo-clk";
+		/* 2nd reg is for the misplaced TRIMINFO register */
+		reg = <0x100a0000 0x100>, <0x10068000 0x4>;
+		interrupts = <0 215 0>;
+		clocks = <&clock 319>, <&clock 318>;
+		clock-names = "tmu_apbif", "tmu_apbif_triminfo";
+	};
 };