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Wed, 27 Nov 2013 23:30:58 -0500 Received: from epcpsbgr2.samsung.com (u142.gpu120.samsung.co.kr [203.254.230.142]) by mailout1.samsung.com (Oracle Communications Messaging Server 7u4-24.01 (7.0.4.24.0) 64bit (built Nov 17 2011)) with ESMTP id <0MWY00KMRHVL7N30@mailout1.samsung.com>; Thu, 28 Nov 2013 13:30:57 +0900 (KST) Received: from epcpsbgm2.samsung.com ( [172.20.52.126]) by epcpsbgr2.samsung.com (EPCPMTA) with SMTP id 74.F3.18301.107C6925; Thu, 28 Nov 2013 13:30:57 +0900 (KST) X-AuditID: cbfee68e-b7f7e6d00000477d-66-5296c701b945 Received: from epmmp1.local.host ( [203.254.227.16]) by epcpsbgm2.samsung.com (EPCPMTA) with SMTP id 4D.54.31284.107C6925; Thu, 28 Nov 2013 13:30:57 +0900 (KST) Received: from chrome-server.sisodomain.com ([107.108.73.106]) by mmp1.samsung.com (Oracle Communications Messaging Server 7u4-24.01(7.0.4.24.0) 64bit (built Nov 17 2011)) with ESMTPA id <0MWY00FFTHVCUMY0@mmp1.samsung.com>; Thu, 28 Nov 2013 13:30:57 +0900 (KST) From: Leela Krishna Amudala To: linux-samsung-soc@vger.kernel.org, wim@iguana.be Cc: dianders@chromium.org, kgene.kim@samsung.com, t.figa@samsung.com, devicetree@vger.kernel.org, linux-watchdog@vger.kernel.org, cpgs@samsung.com, linux@roeck-us.net Subject: [PATCH V11 2/3] watchdog: s3c2410_wdt: use syscon regmap interface to configure pmu register Date: Thu, 28 Nov 2013 10:04:02 +0530 Message-id: <1385613243-3559-3-git-send-email-l.krishna@samsung.com> X-Mailer: git-send-email 1.7.10.4 In-reply-to: <1385613243-3559-1-git-send-email-l.krishna@samsung.com> References: <1385613243-3559-1-git-send-email-l.krishna@samsung.com> X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFvrHLMWRmVeSWpSXmKPExsWyRsSkTpfx+LQgg4O3dC1eHtK0mH/kHKvF 2WUH2Sx6F1xls5hxfh+TxY11+9gtniw8w2SxfsZrFotbM16wOnB6zG64yOJxbbOYx87vDewe fVtWMXp83iQXwBrFZZOSmpNZllqkb5fAlfHpYBNrwfzwin+9L5kbGL+4dzFycEgImEjM+WLW xcgJZIpJXLi3nq2LkYtDSGApo8SkxtXMEAkTiSMTWlkgEosYJX5P3QNV1csk8aWjhQ2kik3A WOL+3M1MILYIUMf1uWfAipgFVjFKrFt3lBEkISyQLvFo1Xowm0VAVeLZintgDbwCLhJLuyey QqxTlOh+NoEN5DxOAVeJ88vEQMJCQCWLbs5kApkpIbCKXeLn8aWsEHMEJL5NPsQC8Y6sxKYD UFdLShxccYNlAqPwAkaGVYyiqQXJBcVJ6UVGesWJucWleel6yfm5mxiBYX/637O+HYw3D1gf YkwGGjeRWUo0OR8YN3kl8YbGZkYWpiamxkbmlmakCSuJ8y56mBQkJJCeWJKanZpakFoUX1Sa k1p8iJGJg1OqgXG936mUl6+K/KScfaR92yazb1uaanP/c71l/5/YlmcV7ZMkDjrfeupt4fJs 5ne5bW1TK8UUWh3bDq07lOGfW3jQdUa4/NR04/mXEz4cvbg+3L/RpvR9wet16xO65wVa3/ty OfuQmdX/iQ8Wr5/YprG1z2b5VdPw3+d0lx84dyGyM/aswDF+xytKLMUZiYZazEXFiQDJuBte kQIAAA== X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFrrDIsWRmVeSWpSXmKPExsVy+t9jAV3G49OCDH7+VLR4eUjTYv6Rc6wW Z5cdZLPoXXCVzWLG+X1MFjfW7WO3eLLwDJPF+hmvWSxuzXjB6sDpMbvhIovHtc1iHju/N7B7 9G1ZxejxeZNcAGtUA6NNRmpiSmqRQmpecn5KZl66rZJ3cLxzvKmZgaGuoaWFuZJCXmJuqq2S i0+ArltmDtA9SgpliTmlQKGAxOJiJX07TBNCQ9x0LWAaI3R9Q4LgeowM0EDCGsaMTwebWAvm h1f8633J3MD4xb2LkZNDQsBE4siEVhYIW0ziwr31bF2MXBxCAosYJX5P3QPl9DJJfOloYQOp YhMwlrg/dzMTiC0C1H197hmwImaBVYwS69YdZQRJCAukSzxatR7MZhFQlXi24h5YA6+Ai8TS 7omsEOsUJbqfTQBq5uDgFHCVOL9MDCQsBFSy6OZMpgmMvAsYGVYxiqYWJBcUJ6XnGukVJ+YW l+al6yXn525iBMfVM+kdjKsaLA4xCnAwKvHwSuhMCxJiTSwrrsw9xCjBwawkwqtQDBTiTUms rEotyo8vKs1JLT7EmAx01ERmKdHkfGDM55XEGxqbmJsam1qaWJiYWZImrCTOe7DVOlBIID2x JDU7NbUgtQhmCxMHp1QDY+y/uB8zfk67eWBK3LUa4ZxoM2sFDUsWcamlL18ty7+ZHPWwWz9N 1smg5v3DVRN6t3VsyP51xl6rWfunwF1h/j1Pr/ybcoBP8+up/HqJ+M98Tucv3VOWvChzcfr3 yXun/ffMDvGd8PldW4/TxUNSGh9evMu1dTujLnD3v5j21MNeh7dPnq/KzKnEUpyRaKjFXFSc CAD9qzmz7wIAAA== DLP-Filter: Pass X-MTR: 20000000000000000@CPGS X-CFilter-Loop: Reflected Sender: linux-samsung-soc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-samsung-soc@vger.kernel.org X-Spam-Status: No, score=-6.9 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_HI, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Add device tree support for exynos5250 and 5420 SoCs and use syscon regmap interface to configure AUTOMATIC_WDT_RESET_DISABLE and MASK_WDT_RESET_REQUEST registers of PMU to mask/unmask enable/disable of watchdog in probe and s2r scenarios. Signed-off-by: Leela Krishna Amudala Reviewed-by: Doug Anderson Tested-by: Doug Anderson --- .../devicetree/bindings/watchdog/samsung-wdt.txt | 21 ++- drivers/watchdog/Kconfig | 1 + drivers/watchdog/s3c2410_wdt.c | 159 ++++++++++++++++++-- 3 files changed, 171 insertions(+), 10 deletions(-) diff --git a/Documentation/devicetree/bindings/watchdog/samsung-wdt.txt b/Documentation/devicetree/bindings/watchdog/samsung-wdt.txt index 2aa486c..cfff375 100644 --- a/Documentation/devicetree/bindings/watchdog/samsung-wdt.txt +++ b/Documentation/devicetree/bindings/watchdog/samsung-wdt.txt @@ -5,10 +5,29 @@ after a preset amount of time during which the WDT reset event has not occurred. Required properties: -- compatible : should be "samsung,s3c2410-wdt" +- compatible : should be one among the following + (a) "samsung,s3c2410-wdt" for Exynos4 and previous SoCs + (b) "samsung,exynos5250-wdt" for Exynos5250 + (c) "samsung,exynos5420-wdt" for Exynos5420 + - reg : base physical address of the controller and length of memory mapped region. - interrupts : interrupt number to the cpu. +- samsung,syscon-phandle : reference to syscon node (This property required only + in case of compatible being "samsung,exynos5250-wdt" or "samsung,exynos5420-wdt". + In case of Exynos5250 and 5420 this property points to syscon node holding the PMU + base address) Optional properties: - timeout-sec : contains the watchdog timeout in seconds. + +Example: + +watchdog@101D0000 { + compatible = "samsung,exynos5250-wdt"; + reg = <0x101D0000 0x100>; + interrupts = <0 42 0>; + clocks = <&clock 336>; + clock-names = "watchdog"; + samsung,syscon-phandle = <&pmu_syscon>; +}; diff --git a/drivers/watchdog/Kconfig b/drivers/watchdog/Kconfig index 5be6e91..24738c0 100644 --- a/drivers/watchdog/Kconfig +++ b/drivers/watchdog/Kconfig @@ -188,6 +188,7 @@ config S3C2410_WATCHDOG tristate "S3C2410 Watchdog" depends on HAVE_S3C2410_WATCHDOG select WATCHDOG_CORE + select MFD_SYSCON if ARCH_EXYNOS5 help Watchdog timer block in the Samsung SoCs. This will reboot the system when the timer expires with the watchdog enabled. diff --git a/drivers/watchdog/s3c2410_wdt.c b/drivers/watchdog/s3c2410_wdt.c index 7d8fd04..47f4dcf 100644 --- a/drivers/watchdog/s3c2410_wdt.c +++ b/drivers/watchdog/s3c2410_wdt.c @@ -40,6 +40,8 @@ #include #include #include +#include +#include #define S3C2410_WTCON 0x00 #define S3C2410_WTDAT 0x04 @@ -60,6 +62,10 @@ #define CONFIG_S3C2410_WATCHDOG_ATBOOT (0) #define CONFIG_S3C2410_WATCHDOG_DEFAULT_TIME (15) +#define WDT_DISABLE_REG_OFFSET 0x0408 +#define WDT_MASK_RESET_REG_OFFSET 0x040c +#define QUIRK_NEEDS_PMU_CONFIG (1 << 0) + static bool nowayout = WATCHDOG_NOWAYOUT; static int tmr_margin; static int tmr_atboot = CONFIG_S3C2410_WATCHDOG_ATBOOT; @@ -83,6 +89,25 @@ MODULE_PARM_DESC(soft_noboot, "Watchdog action, set to 1 to ignore reboots, " "0 to reboot (default 0)"); MODULE_PARM_DESC(debug, "Watchdog debug, set to >1 for debug (default 0)"); +/** + * struct s3c2410_wdt_variant - Per-variant config data + * + * @disable_reg: Offset in pmureg for the register that disables the watchdog + * timer reset functionality. + * @mask_reset_reg: Offset in pmureg for the register that masks the watchdog + * timer reset functionality. + * @mask_bit: Bit number for the watchdog timer in the disable register and the + * mask reset register. + * @quirks: A bitfield of quirks. + */ + +struct s3c2410_wdt_variant { + int disable_reg; + int mask_reset_reg; + int mask_bit; + u32 quirks; +}; + struct s3c2410_wdt { struct device *dev; struct clk *clock; @@ -93,8 +118,50 @@ struct s3c2410_wdt { unsigned long wtdat_save; struct watchdog_device wdt_device; struct notifier_block freq_transition; + struct s3c2410_wdt_variant *drv_data; + struct regmap *pmureg; }; +static const struct s3c2410_wdt_variant drv_data_s3c2410 = { + .quirks = 0 +}; + +#ifdef CONFIG_OF +static const struct s3c2410_wdt_variant drv_data_exynos5250 = { + .disable_reg = WDT_DISABLE_REG_OFFSET, + .mask_reset_reg = WDT_MASK_RESET_REG_OFFSET, + .mask_bit = 20, + .quirks = QUIRK_NEEDS_PMU_CONFIG +}; + +static const struct s3c2410_wdt_variant drv_data_exynos5420 = { + .disable_reg = WDT_DISABLE_REG_OFFSET, + .mask_reset_reg = WDT_MASK_RESET_REG_OFFSET, + .mask_bit = 0, + .quirks = QUIRK_NEEDS_PMU_CONFIG +}; + +static const struct of_device_id s3c2410_wdt_match[] = { + { .compatible = "samsung,s3c2410-wdt", + .data = &drv_data_s3c2410 }, + { .compatible = "samsung,exynos5250-wdt", + .data = &drv_data_exynos5250 }, + { .compatible = "samsung,exynos5420-wdt", + .data = &drv_data_exynos5420 }, + {}, +}; +MODULE_DEVICE_TABLE(of, s3c2410_wdt_match); +#endif + +static const struct platform_device_id s3c2410_wdt_ids[] = { + { + .name = "s3c2410-wdt", + .driver_data = (unsigned long)&drv_data_s3c2410, + }, + {} +}; +MODULE_DEVICE_TABLE(platform, s3c2410_wdt_ids); + /* watchdog control routines */ #define DBG(fmt, ...) \ @@ -110,6 +177,31 @@ static inline struct s3c2410_wdt *freq_to_wdt(struct notifier_block *nb) return container_of(nb, struct s3c2410_wdt, freq_transition); } +static int s3c2410wdt_mask_and_disable_reset(struct s3c2410_wdt *wdt, bool mask) +{ + int ret; + u32 mask_val = 1 << wdt->drv_data->mask_bit; + u32 val = 0; + + if (mask) + val = mask_val; + + ret = regmap_update_bits(wdt->pmureg, + wdt->drv_data->disable_reg, + mask_val, val); + if (ret < 0) + goto error; + + ret = regmap_update_bits(wdt->pmureg, + wdt->drv_data->mask_reset_reg, + mask_val, val); + error: + if (ret < 0) + dev_err(wdt->dev, "failed to update reg(%d)\n", ret); + + return ret; +} + static int s3c2410wdt_keepalive(struct watchdog_device *wdd) { struct s3c2410_wdt *wdt = watchdog_get_drvdata(wdd); @@ -331,6 +423,20 @@ static inline void s3c2410wdt_cpufreq_deregister(struct s3c2410_wdt *wdt) } #endif +/* s3c2410_get_wdt_driver_data */ +static inline struct s3c2410_wdt_variant * +get_wdt_drv_data(struct platform_device *pdev) +{ + if (pdev->dev.of_node) { + const struct of_device_id *match; + match = of_match_node(s3c2410_wdt_match, pdev->dev.of_node); + return (struct s3c2410_wdt_variant *)match->data; + } else { + return (struct s3c2410_wdt_variant *) + platform_get_device_id(pdev)->driver_data; + } +} + static int s3c2410wdt_probe(struct platform_device *pdev) { struct device *dev; @@ -353,6 +459,16 @@ static int s3c2410wdt_probe(struct platform_device *pdev) spin_lock_init(&wdt->lock); wdt->wdt_device = s3c2410_wdd; + wdt->drv_data = get_wdt_drv_data(pdev); + if (wdt->drv_data->quirks & QUIRK_NEEDS_PMU_CONFIG) { + wdt->pmureg = syscon_regmap_lookup_by_phandle(dev->of_node, + "samsung,syscon-phandle"); + if (IS_ERR(wdt->pmureg)) { + dev_err(dev, "syscon regmap lookup failed.\n"); + return PTR_ERR(wdt->pmureg); + } + } + wdt_irq = platform_get_resource(pdev, IORESOURCE_IRQ, 0); if (wdt_irq == NULL) { dev_err(dev, "no irq resource specified\n"); @@ -421,6 +537,12 @@ static int s3c2410wdt_probe(struct platform_device *pdev) goto err_cpufreq; } + if (wdt->drv_data->quirks & QUIRK_NEEDS_PMU_CONFIG) { + ret = s3c2410wdt_mask_and_disable_reset(wdt, false); + if (ret < 0) + goto err_unregister; + } + if (tmr_atboot && started == 0) { dev_info(dev, "starting watchdog timer\n"); s3c2410wdt_start(&wdt->wdt_device); @@ -445,6 +567,9 @@ static int s3c2410wdt_probe(struct platform_device *pdev) return 0; + err_unregister: + watchdog_unregister_device(&wdt->wdt_device); + err_cpufreq: s3c2410wdt_cpufreq_deregister(wdt); @@ -458,8 +583,15 @@ static int s3c2410wdt_probe(struct platform_device *pdev) static int s3c2410wdt_remove(struct platform_device *dev) { + int ret; struct s3c2410_wdt *wdt = platform_get_drvdata(dev); + if (wdt->drv_data->quirks & QUIRK_NEEDS_PMU_CONFIG) { + ret = s3c2410wdt_mask_and_disable_reset(wdt, true); + if (ret < 0) + return ret; + } + watchdog_unregister_device(&wdt->wdt_device); s3c2410wdt_cpufreq_deregister(wdt); @@ -474,6 +606,9 @@ static void s3c2410wdt_shutdown(struct platform_device *dev) { struct s3c2410_wdt *wdt = platform_get_drvdata(dev); + if (wdt->drv_data->quirks & QUIRK_NEEDS_PMU_CONFIG) + s3c2410wdt_mask_and_disable_reset(wdt, true); + s3c2410wdt_stop(&wdt->wdt_device); } @@ -481,12 +616,19 @@ static void s3c2410wdt_shutdown(struct platform_device *dev) static int s3c2410wdt_suspend(struct device *dev) { + int ret; struct s3c2410_wdt *wdt = dev_get_drvdata(dev); /* Save watchdog state, and turn it off. */ wdt->wtcon_save = readl(wdt->reg_base + S3C2410_WTCON); wdt->wtdat_save = readl(wdt->reg_base + S3C2410_WTDAT); + if (wdt->drv_data->quirks & QUIRK_NEEDS_PMU_CONFIG) { + ret = s3c2410wdt_mask_and_disable_reset(wdt, true); + if (ret < 0) + return ret; + } + /* Note that WTCNT doesn't need to be saved. */ s3c2410wdt_stop(&wdt->wdt_device); @@ -495,6 +637,7 @@ static int s3c2410wdt_suspend(struct device *dev) static int s3c2410wdt_resume(struct device *dev) { + int ret; struct s3c2410_wdt *wdt = dev_get_drvdata(dev); /* Restore watchdog state. */ @@ -502,6 +645,12 @@ static int s3c2410wdt_resume(struct device *dev) writel(wdt->wtdat_save, wdt->reg_base + S3C2410_WTCNT);/* Reset count */ writel(wdt->wtcon_save, wdt->reg_base + S3C2410_WTCON); + if (wdt->drv_data->quirks & QUIRK_NEEDS_PMU_CONFIG) { + ret = s3c2410wdt_mask_and_disable_reset(wdt, false); + if (ret < 0) + return ret; + } + dev_info(dev, "watchdog %sabled\n", (wdt->wtcon_save & S3C2410_WTCON_ENABLE) ? "en" : "dis"); @@ -512,18 +661,11 @@ static int s3c2410wdt_resume(struct device *dev) static SIMPLE_DEV_PM_OPS(s3c2410wdt_pm_ops, s3c2410wdt_suspend, s3c2410wdt_resume); -#ifdef CONFIG_OF -static const struct of_device_id s3c2410_wdt_match[] = { - { .compatible = "samsung,s3c2410-wdt" }, - {}, -}; -MODULE_DEVICE_TABLE(of, s3c2410_wdt_match); -#endif - static struct platform_driver s3c2410wdt_driver = { .probe = s3c2410wdt_probe, .remove = s3c2410wdt_remove, .shutdown = s3c2410wdt_shutdown, + .id_table = s3c2410_wdt_ids, .driver = { .owner = THIS_MODULE, .name = "s3c2410-wdt", @@ -538,4 +680,3 @@ MODULE_AUTHOR("Ben Dooks , " "Dimitry Andric "); MODULE_DESCRIPTION("S3C2410 Watchdog Device Driver"); MODULE_LICENSE("GPL"); -MODULE_ALIAS("platform:s3c2410-wdt");