From patchwork Tue Dec 3 11:40:48 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sachin Kamat X-Patchwork-Id: 3275341 Return-Path: X-Original-To: patchwork-linux-samsung-soc@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork2.web.kernel.org (Postfix) with ESMTP id 89636C0D4A for ; Tue, 3 Dec 2013 11:43:33 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 2EFED20379 for ; Tue, 3 Dec 2013 11:43:32 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 4573B201C7 for ; Tue, 3 Dec 2013 11:43:27 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753219Ab3LCLn0 (ORCPT ); Tue, 3 Dec 2013 06:43:26 -0500 Received: from mail-pd0-f170.google.com ([209.85.192.170]:36630 "EHLO mail-pd0-f170.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753205Ab3LCLn0 (ORCPT ); Tue, 3 Dec 2013 06:43:26 -0500 Received: by mail-pd0-f170.google.com with SMTP id g10so19941006pdj.15 for ; Tue, 03 Dec 2013 03:43:25 -0800 (PST) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id; bh=r/VF8mHTQDU2p4SIF9IkHUe0ykAMvfTbjTXKFqrs23c=; b=TZ5/1IQLUZkIJzfbKWrOEq5Klt7psrV2h8RYYTsKcCXNo5IAvelPVnjJA3Fkmxn6vF lAcAYMdQyS1oKCb3Lr5++ST22ym/ehDHP3rHfNv98hVd/soPMvF3oxkZMSLM7ulRsxK1 QjEg80JrFr3SGA2lMdGBE8VOimcLKvrR08C133F3gnF52ZudrpwBFW8LMICPqTAow8x3 ZzELyK3bffgc4tE+Pc9/N6i8NhAbRcP4/zpTtL7gaw+gE/jGGHsgnjb0cDrWyMItl59d 7sK8XmpOQ470/hb5xztdsC3OX26ve4DNmL3HZYZblkeks1/c4W0/Lrlzj2f7lKi1+nuv h6Hw== X-Gm-Message-State: ALoCoQllhI+j5foTKE+ul2aRJactNQZnVpoKQPEYGPQX/68G3mCqyxOHcsllJTByv80Lpi0YzJuy X-Received: by 10.68.211.1 with SMTP id my1mr38292093pbc.55.1386071005532; Tue, 03 Dec 2013 03:43:25 -0800 (PST) Received: from linaro.sisodomain.com ([115.113.119.130]) by mx.google.com with ESMTPSA id yg3sm146797164pab.16.2013.12.03.03.43.23 for (version=TLSv1.1 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Tue, 03 Dec 2013 03:43:24 -0800 (PST) From: Sachin Kamat To: linux-samsung-soc@vger.kernel.org Cc: kgene.kim@samsung.com, sachin.kamat@linaro.org, Ajay Kumar Subject: [PATCH 1/1] ARM: EXYNOS: Add save/restore infra for system registers for Exynos5420 Date: Tue, 3 Dec 2013 17:10:48 +0530 Message-Id: <1386070848-13083-1-git-send-email-sachin.kamat@linaro.org> X-Mailer: git-send-email 1.7.9.5 Sender: linux-samsung-soc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-samsung-soc@vger.kernel.org X-Spam-Status: No, score=-6.9 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_HI, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=ham version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP From: Ajay Kumar Added exynos5420_sys_save[] structure for system registers on Exynos5420. We save the values of all the system registers present in the list exynos5420_sys_save[], and we restore these values on resume. As of now, we have added save/restore entry for EXYNOS5_SYS_DISP1_BLK_CFG. NOTE: Restoring of EXYNOS5_SYS_DISP1_BLK_CFG was not done on Exynos5250 because we use MIE path on Exynos5250 and the default reset value of EXYNOS5_SYS_DISP1_BLK_CFG is set to use MIE. Signed-off-by: Ajay Kumar Tested-by: Prathyush Kalashwaram Signed-off-by: Sachin Kamat --- arch/arm/mach-exynos/include/mach/regs-pmu.h | 1 + arch/arm/mach-exynos/pm.c | 10 ++++++++++ 2 files changed, 11 insertions(+) diff --git a/arch/arm/mach-exynos/include/mach/regs-pmu.h b/arch/arm/mach-exynos/include/mach/regs-pmu.h index 2cdb63e8ce5c..c58b43a19020 100644 --- a/arch/arm/mach-exynos/include/mach/regs-pmu.h +++ b/arch/arm/mach-exynos/include/mach/regs-pmu.h @@ -227,6 +227,7 @@ /* For EXYNOS5 */ +#define EXYNOS5_SYS_DISP1_BLK_CFG S5P_SYSREG(0x0214) #define EXYNOS5_SYS_I2C_CFG S5P_SYSREG(0x0234) #define EXYNOS5_AUTO_WDTRESET_DISABLE S5P_PMUREG(0x0408) diff --git a/arch/arm/mach-exynos/pm.c b/arch/arm/mach-exynos/pm.c index 1578d435df43..a1b7b79b70fa 100644 --- a/arch/arm/mach-exynos/pm.c +++ b/arch/arm/mach-exynos/pm.c @@ -39,6 +39,10 @@ static struct sleep_save exynos5_sys_save[] = { SAVE_ITEM(EXYNOS5_SYS_I2C_CFG), }; +static struct sleep_save exynos5420_sys_save[] = { + SAVE_ITEM(EXYNOS5_SYS_DISP1_BLK_CFG), +}; + static struct sleep_save exynos_core_save[] = { /* SROM side */ SAVE_ITEM(S5P_SROM_BW), @@ -80,6 +84,9 @@ static void exynos_pm_prepare(void) tmp = __raw_readl(EXYNOS5_JPEG_MEM_OPTION); tmp &= ~EXYNOS5_OPTION_USE_RETENTION; __raw_writel(tmp, EXYNOS5_JPEG_MEM_OPTION); + } else if (soc_is_exynos5420()) { + s3c_pm_do_save(exynos5420_sys_save, + ARRAY_SIZE(exynos5420_sys_save)); } /* Set value of power down register for sleep mode */ @@ -256,6 +263,9 @@ static void exynos_pm_resume(void) if (soc_is_exynos5250()) s3c_pm_do_restore(exynos5_sys_save, ARRAY_SIZE(exynos5_sys_save)); + else if (soc_is_exynos5420()) + s3c_pm_do_restore(exynos5420_sys_save, + ARRAY_SIZE(exynos5420_sys_save)); s3c_pm_do_restore_core(exynos_core_save, ARRAY_SIZE(exynos_core_save));