From patchwork Wed Mar 19 10:25:04 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sachin Kamat X-Patchwork-Id: 3858491 Return-Path: X-Original-To: patchwork-linux-samsung-soc@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork1.web.kernel.org (Postfix) with ESMTP id D4A489F369 for ; Wed, 19 Mar 2014 18:10:12 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id DD04F2017D for ; Wed, 19 Mar 2014 18:10:11 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id ECA2220220 for ; Wed, 19 Mar 2014 18:10:10 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1759014AbaCSKbf (ORCPT ); Wed, 19 Mar 2014 06:31:35 -0400 Received: from mail-pa0-f42.google.com ([209.85.220.42]:54393 "EHLO mail-pa0-f42.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1758259AbaCSKbe (ORCPT ); Wed, 19 Mar 2014 06:31:34 -0400 Received: by mail-pa0-f42.google.com with SMTP id fb1so8784107pad.29 for ; Wed, 19 Mar 2014 03:31:33 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=1c47Up7mcHTxwVOtD/Xks9XZAWUjvPPehfNUbKoz6UY=; b=hcC5nL7diZeb1TOafOOjuhvSrimB/+CuW6zKiiTSPzRxvWSPaImg30+sjxopimKU/T /VkbS/+wGuQDs+NSGLCqibvgEPAWWByeF+rJ5+kTQ8rAkinT1LlRNhVGxqfCJujMG8nH wgXJ/7D6T3LXfPlWtrJc4sqykh6JrS7nZyh2M18nWnbyiU1A4BRq8I4YZG4TFcE63JLf PgX0zE2We6Udl3DFmiAiUR4x1eRD1XacrM4rNzn81MezHGJD0Q/IRjwwutls8vJF5/NO 2MmCzPsk99GFIKpRURjmIsRUxyWiGR8wWrnsHGX6zQyoC6t4mRAEzYWh1uIpCfrMiDYf 6dgQ== X-Gm-Message-State: ALoCoQmwG4Wcxp47HHWQ0khPyf+nQFWYNp0Y9Yl8RvyRcDg+HYvhkEso6lL+9hQ/0Vw6WIVxy/5O X-Received: by 10.68.241.73 with SMTP id wg9mr40432991pbc.62.1395225093475; Wed, 19 Mar 2014 03:31:33 -0700 (PDT) Received: from linaro.sisodomain.com ([115.113.119.130]) by mx.google.com with ESMTPSA id kc9sm60944281pbc.25.2014.03.19.03.31.30 for (version=TLSv1.1 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Wed, 19 Mar 2014 03:31:32 -0700 (PDT) From: Sachin Kamat To: linux-samsung-soc@vger.kernel.org Cc: devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, kgene.kim@samsung.com, mark.rutland@arm.com, sachin.kamat@linaro.org Subject: [PATCH Resend 2/3] ARM: EXYNOS: Consolidate CPU init code Date: Wed, 19 Mar 2014 15:55:04 +0530 Message-Id: <1395224705-2935-2-git-send-email-sachin.kamat@linaro.org> X-Mailer: git-send-email 1.7.9.5 In-Reply-To: <1395224705-2935-1-git-send-email-sachin.kamat@linaro.org> References: <1395224705-2935-1-git-send-email-sachin.kamat@linaro.org> Sender: linux-samsung-soc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-samsung-soc@vger.kernel.org X-Spam-Status: No, score=-6.9 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_HI, T_RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP cpu_table was used to distinguish between different Exynos4 and 5 SoCs and based on the type do the initialization and io mapping. exynos_init is dummy and no longer needed as we do a DT based booting. By having a common io mapping function we can get rid of the whole table and avoid populating it for every SoC. Tested on Exynos4210, 5250 and 5420 based boards. Signed-off-by: Sachin Kamat Tested-by: Tomasz Figa --- arch/arm/mach-exynos/common.c | 108 +++++++++-------------------------------- 1 file changed, 23 insertions(+), 85 deletions(-) diff --git a/arch/arm/mach-exynos/common.c b/arch/arm/mach-exynos/common.c index e98ddadc5f74..10ed374c0744 100644 --- a/arch/arm/mach-exynos/common.c +++ b/arch/arm/mach-exynos/common.c @@ -48,56 +48,6 @@ #define L2_AUX_VAL 0x7C470001 #define L2_AUX_MASK 0xC200ffff -static const char name_exynos4210[] = "EXYNOS4210"; -static const char name_exynos4212[] = "EXYNOS4212"; -static const char name_exynos4412[] = "EXYNOS4412"; -static const char name_exynos5250[] = "EXYNOS5250"; -static const char name_exynos5420[] = "EXYNOS5420"; -static const char name_exynos5440[] = "EXYNOS5440"; - -static void exynos4_map_io(void); -static void exynos5_map_io(void); -static int exynos_init(void); - -static struct cpu_table cpu_ids[] __initdata = { - { - .idcode = EXYNOS4210_CPU_ID, - .idmask = EXYNOS4_CPU_MASK, - .map_io = exynos4_map_io, - .init = exynos_init, - .name = name_exynos4210, - }, { - .idcode = EXYNOS4212_CPU_ID, - .idmask = EXYNOS4_CPU_MASK, - .map_io = exynos4_map_io, - .init = exynos_init, - .name = name_exynos4212, - }, { - .idcode = EXYNOS4412_CPU_ID, - .idmask = EXYNOS4_CPU_MASK, - .map_io = exynos4_map_io, - .init = exynos_init, - .name = name_exynos4412, - }, { - .idcode = EXYNOS5250_SOC_ID, - .idmask = EXYNOS5_SOC_MASK, - .map_io = exynos5_map_io, - .init = exynos_init, - .name = name_exynos5250, - }, { - .idcode = EXYNOS5420_SOC_ID, - .idmask = EXYNOS5_SOC_MASK, - .map_io = exynos5_map_io, - .init = exynos_init, - .name = name_exynos5420, - }, { - .idcode = EXYNOS5440_SOC_ID, - .idmask = EXYNOS5_SOC_MASK, - .init = exynos_init, - .name = name_exynos5440, - }, -}; - /* Initial IO mappings */ static struct map_desc exynos4_iodesc[] __initdata = { @@ -346,6 +296,28 @@ static int __init exynos_fdt_map_chipid(unsigned long node, const char *uname, * * register the standard cpu IO areas */ +static void __init exynos_map_io(void) +{ + if (soc_is_exynos4210() || soc_is_exynos4212() || soc_is_exynos4412()) + iotable_init(exynos4_iodesc, ARRAY_SIZE(exynos4_iodesc)); + + if (soc_is_exynos5250() || soc_is_exynos5420()) + iotable_init(exynos5_iodesc, ARRAY_SIZE(exynos5_iodesc)); + + if (soc_is_exynos4210()) { + if (samsung_rev() == EXYNOS4210_REV_0) + iotable_init(exynos4_iodesc0, + ARRAY_SIZE(exynos4_iodesc0)); + else + iotable_init(exynos4_iodesc1, + ARRAY_SIZE(exynos4_iodesc1)); + iotable_init(exynos4210_iodesc, ARRAY_SIZE(exynos4210_iodesc)); + } + if (soc_is_exynos4212() || soc_is_exynos4412()) + iotable_init(exynos4x12_iodesc, ARRAY_SIZE(exynos4x12_iodesc)); + if (soc_is_exynos5250()) + iotable_init(exynos5250_iodesc, ARRAY_SIZE(exynos5250_iodesc)); +} void __init exynos_init_io(void) { @@ -356,30 +328,7 @@ void __init exynos_init_io(void) /* detect cpu id and rev. */ s5p_init_cpu(S5P_VA_CHIPID); - s3c_init_cpu(samsung_cpu_id, cpu_ids, ARRAY_SIZE(cpu_ids)); -} - -static void __init exynos4_map_io(void) -{ - iotable_init(exynos4_iodesc, ARRAY_SIZE(exynos4_iodesc)); - - if (soc_is_exynos4210() && samsung_rev() == EXYNOS4210_REV_0) - iotable_init(exynos4_iodesc0, ARRAY_SIZE(exynos4_iodesc0)); - else - iotable_init(exynos4_iodesc1, ARRAY_SIZE(exynos4_iodesc1)); - - if (soc_is_exynos4210()) - iotable_init(exynos4210_iodesc, ARRAY_SIZE(exynos4210_iodesc)); - if (soc_is_exynos4212() || soc_is_exynos4412()) - iotable_init(exynos4x12_iodesc, ARRAY_SIZE(exynos4x12_iodesc)); -} - -static void __init exynos5_map_io(void) -{ - iotable_init(exynos5_iodesc, ARRAY_SIZE(exynos5_iodesc)); - - if (soc_is_exynos5250()) - iotable_init(exynos5250_iodesc, ARRAY_SIZE(exynos5250_iodesc)); + exynos_map_io(); } struct bus_type exynos_subsys = { @@ -387,10 +336,6 @@ struct bus_type exynos_subsys = { .dev_name = "exynos-core", }; -static struct device exynos4_dev = { - .bus = &exynos_subsys, -}; - static int __init exynos_core_init(void) { return subsys_system_register(&exynos_subsys, NULL); @@ -410,10 +355,3 @@ static int __init exynos4_l2x0_cache_init(void) return 0; } early_initcall(exynos4_l2x0_cache_init); - -static int __init exynos_init(void) -{ - printk(KERN_INFO "EXYNOS: Initializing architecture\n"); - - return device_register(&exynos4_dev); -}