From patchwork Tue Apr 8 16:15:37 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Chander Kashyap X-Patchwork-Id: 3949841 Return-Path: X-Original-To: patchwork-linux-samsung-soc@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork2.web.kernel.org (Postfix) with ESMTP id 8DE1ABFF02 for ; Tue, 8 Apr 2014 16:15:54 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id AC16F203DF for ; Tue, 8 Apr 2014 16:15:53 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id BC4F5203B8 for ; Tue, 8 Apr 2014 16:15:52 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1756724AbaDHQPw (ORCPT ); Tue, 8 Apr 2014 12:15:52 -0400 Received: from mail-pd0-f179.google.com ([209.85.192.179]:49342 "EHLO mail-pd0-f179.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1756329AbaDHQPv (ORCPT ); Tue, 8 Apr 2014 12:15:51 -0400 Received: by mail-pd0-f179.google.com with SMTP id w10so1206008pde.24 for ; Tue, 08 Apr 2014 09:15:51 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id; bh=oWdxwCXd0+uNe7yb7ZZ16rhu9eocK9Q1EvmRQp7Yodw=; b=OWmWrvvruyZplvJrEblUWLhQehCC7bcXK+8zYQwjVQMrVSdHXrjCZtUAWNAzYzjUWY xFLSiFmyzglPIiyKwDcVjx6R0yegs3TkK+sNk4YqDtXcZCot7KwcM5KyJ1LS1LpJNJDW DiUzeGifJ39W1gcj9ktmK3heam/VBRkcI+Kp9a4cRCu3ecEgNjamDgUDpFFop5V2E0kd 3g4KXclDLoqA2pqCXmOlaZtMml84OkpfN52ATVMwXpss/HrjdXv6eocoTVYmwNXKy2ux nM8es8gmrngpe7ZBKtWs/N+eKqJytxmtc1OcMHjCmJR4QoHKGY9gKJE0rPbqHLEM2m3K hOQg== X-Gm-Message-State: ALoCoQmfJ+fdFiKWX24X4fLNvVxZIk/iAhbkg6cQrXepwRrfYu77m7cXUsNd2OgVcpO+a9ErA+ZD X-Received: by 10.68.203.135 with SMTP id kq7mr5669386pbc.85.1396973750870; Tue, 08 Apr 2014 09:15:50 -0700 (PDT) Received: from localhost.localdomain ([115.113.119.130]) by mx.google.com with ESMTPSA id zv3sm12318312pab.20.2014.04.08.09.15.47 for (version=TLSv1.1 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Tue, 08 Apr 2014 09:15:49 -0700 (PDT) From: Chander Kashyap To: linux-samsung-soc@vger.kernel.org, linux-arm-kernel@lists.infradead.org Cc: kgene.kim@samsung.com, Chander Kashyap Subject: [PATCH] arm: exynos: generalize power register address calculation Date: Tue, 8 Apr 2014 21:45:37 +0530 Message-Id: <1396973737-18693-1-git-send-email-chander.kashyap@linaro.org> X-Mailer: git-send-email 1.7.9.5 Sender: linux-samsung-soc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-samsung-soc@vger.kernel.org X-Spam-Status: No, score=-7.2 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_HI, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=ham version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Currently status/configuration power register values are hard-coded for cpu1. Make it generic so that it is useful for SoC's with more than two cpus. Signed-off-by: Chander Kashyap --- arch/arm/mach-exynos/hotplug.c | 10 +++++++--- arch/arm/mach-exynos/platsmp.c | 13 ++++++++----- arch/arm/mach-exynos/regs-pmu.h | 9 +++++++-- 3 files changed, 22 insertions(+), 10 deletions(-) diff --git a/arch/arm/mach-exynos/hotplug.c b/arch/arm/mach-exynos/hotplug.c index 5eead53..460aec0 100644 --- a/arch/arm/mach-exynos/hotplug.c +++ b/arch/arm/mach-exynos/hotplug.c @@ -92,11 +92,15 @@ static inline void cpu_leave_lowpower(void) static inline void platform_do_lowpower(unsigned int cpu, int *spurious) { + unsigned long phys_cpu = cpu_logical_map(cpu); + unsigned int cpunr; + + cpunr = phys_cpu & 0xF00 ? (4 + phys_cpu & 0xFF) : phys_cpu & 0xFF; for (;;) { - /* make cpu1 to be turned off at next WFI command */ - if (cpu == 1) - __raw_writel(0, S5P_ARM_CORE1_CONFIGURATION); + /* make cpu to be turned off at next WFI command */ + if (cpu) + __raw_writel(0, S5P_ARM_CORE_CONFIGURATION(cpunr)); /* * here's the WFI diff --git a/arch/arm/mach-exynos/platsmp.c b/arch/arm/mach-exynos/platsmp.c index 8ea02f6..e694bdf 100644 --- a/arch/arm/mach-exynos/platsmp.c +++ b/arch/arm/mach-exynos/platsmp.c @@ -92,6 +92,7 @@ static int exynos_boot_secondary(unsigned int cpu, struct task_struct *idle) { unsigned long timeout; unsigned long phys_cpu = cpu_logical_map(cpu); + unsigned int cpunr; /* * Set synchronisation state between this boot processor @@ -109,14 +110,16 @@ static int exynos_boot_secondary(unsigned int cpu, struct task_struct *idle) */ write_pen_release(phys_cpu); - if (!(__raw_readl(S5P_ARM_CORE1_STATUS) & S5P_CORE_LOCAL_PWR_EN)) { + cpunr = phys_cpu & 0xF00 ? (4 + phys_cpu & 0xFF) : phys_cpu & 0xFF; + if (!(__raw_readl(S5P_ARM_CORE_STATUS(cpunr)) + & S5P_CORE_LOCAL_PWR_EN)) { __raw_writel(S5P_CORE_LOCAL_PWR_EN, - S5P_ARM_CORE1_CONFIGURATION); + S5P_ARM_CORE_CONFIGURATION(cpunr)); timeout = 10; - /* wait max 10 ms until cpu1 is on */ - while ((__raw_readl(S5P_ARM_CORE1_STATUS) + /* wait max 10 ms until secondary cpu is on */ + while ((__raw_readl(S5P_ARM_CORE_STATUS(cpunr)) & S5P_CORE_LOCAL_PWR_EN) != S5P_CORE_LOCAL_PWR_EN) { if (timeout-- == 0) break; @@ -125,7 +128,7 @@ static int exynos_boot_secondary(unsigned int cpu, struct task_struct *idle) } if (timeout == 0) { - printk(KERN_ERR "cpu1 power enable failed"); + pr_err("cpu%x power enable failed", cpu); spin_unlock(&boot_lock); return -ETIMEDOUT; } diff --git a/arch/arm/mach-exynos/regs-pmu.h b/arch/arm/mach-exynos/regs-pmu.h index 7c029ce..16e17e4 100644 --- a/arch/arm/mach-exynos/regs-pmu.h +++ b/arch/arm/mach-exynos/regs-pmu.h @@ -104,8 +104,13 @@ #define S5P_GPS_LOWPWR S5P_PMUREG(0x139C) #define S5P_GPS_ALIVE_LOWPWR S5P_PMUREG(0x13A0) -#define S5P_ARM_CORE1_CONFIGURATION S5P_PMUREG(0x2080) -#define S5P_ARM_CORE1_STATUS S5P_PMUREG(0x2084) +#define S5P_ARM_CORE0_CONFIGURATION S5P_PMUREG(0x2000) +#define S5P_ARM_CORE0_STATUS S5P_PMUREG(0x2004) + +#define S5P_ARM_CORE_CONFIGURATION(_cpunr) \ + (S5P_ARM_CORE0_CONFIGURATION + 0x80 * _cpunr) +#define S5P_ARM_CORE_STATUS(_cpunr) \ + (S5P_ARM_CORE0_STATUS + 0x80 * _cpunr) #define S5P_PAD_RET_MAUDIO_OPTION S5P_PMUREG(0x3028) #define S5P_PAD_RET_GPIO_OPTION S5P_PMUREG(0x3108)