From patchwork Fri Apr 18 14:42:59 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tomasz Figa X-Patchwork-Id: 4016511 Return-Path: X-Original-To: patchwork-linux-samsung-soc@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork2.web.kernel.org (Postfix) with ESMTP id A6B96C0DA2 for ; Fri, 18 Apr 2014 14:43:21 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id C5F9920272 for ; Fri, 18 Apr 2014 14:43:20 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id C9C9F20270 for ; Fri, 18 Apr 2014 14:43:19 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753422AbaDROnS (ORCPT ); Fri, 18 Apr 2014 10:43:18 -0400 Received: from mailout1.w1.samsung.com ([210.118.77.11]:29203 "EHLO mailout1.w1.samsung.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753298AbaDROnP (ORCPT ); Fri, 18 Apr 2014 10:43:15 -0400 Received: from eucpsbgm1.samsung.com (unknown [203.254.199.244]) by mailout1.w1.samsung.com (Oracle Communications Messaging Server 7u4-24.01(7.0.4.24.0) 64bit (built Nov 17 2011)) with ESMTP id <0N4800IHNE7Z0S60@mailout1.w1.samsung.com>; Fri, 18 Apr 2014 15:43:12 +0100 (BST) X-AuditID: cbfec7f4-b7f796d000005a13-c7-53513a00b526 Received: from eusync3.samsung.com ( [203.254.199.213]) by eucpsbgm1.samsung.com (EUCPMTA) with SMTP id 9F.46.23059.00A31535; Fri, 18 Apr 2014 15:43:12 +0100 (BST) Received: from AMDC1227.digital.local ([106.116.147.199]) by eusync3.samsung.com (Oracle Communications Messaging Server 7u4-23.01(7.0.4.23.0) 64bit (built Aug 10 2011)) with ESMTPA id <0N480017ZE7W2P00@eusync3.samsung.com>; Fri, 18 Apr 2014 15:43:12 +0100 (BST) From: Tomasz Figa To: linux-samsung-soc@vger.kernel.org Cc: linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, Rob Herring , Mark Rutland , Kukjin Kim , Thomas Gleixner , Marc Zyngier , Arnd Bergmann , Marek Szyprowski , Tomasz Figa , Tomasz Figa Subject: [PATCH 2/4] ARM: EXYNOS: Fix core ID used by platsmp and hotplug code Date: Fri, 18 Apr 2014 16:42:59 +0200 Message-id: <1397832181-5153-3-git-send-email-t.figa@samsung.com> X-Mailer: git-send-email 1.9.2 In-reply-to: <1397832181-5153-1-git-send-email-t.figa@samsung.com> References: <1397832181-5153-1-git-send-email-t.figa@samsung.com> X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFprHLMWRmVeSWpSXmKPExsVy+t/xq7oMVoHBBh8fqlj8nXSM3WL+kXOs Fr0LrrJZbHp8jdVixvl9TBZrj9xlt/h75x+bxdLrF5ksWvceYbdYP+M1i8XmTVOZLVbt+sPo wOOxZt4aRo/fvyYxeuycdZfdY9OqTjaPd+fOsXtsXlLv0bdlFaPH501yARxRXDYpqTmZZalF +nYJXBkt866zFfQoVzxZ8IOtgfGETBcjJ4eEgInEq7tzmSFsMYkL99azdTFycQgJLGWU+Hj8 I5TTxyTR8uc5G0gVm4CaxOeGR2C2iICqxOe2BewgRcwC05klvh3pZAFJCAv4SWyasAFsLAtQ 0ZLuR2BxXgFHiRnLT7NCrJOT+P9yBROIzSngJLF84gWwGiGgmi3XGhgnMPIuYGRYxSiaWppc UJyUnmuoV5yYW1yal66XnJ+7iRESpl92MC4+ZnWIUYCDUYmHV+OHf7AQa2JZcWXuIUYJDmYl Ed7dfwOChXhTEiurUovy44tKc1KLDzEycXBKNTAWTolfdSrCq+dP4YnGNheBdteCUyturTt7 7F2be+odod08t9mu6agXii77NUNngZ3SNu6X9Sv85N+/tGPcdyQzOrxHOq5vz5aD7jPuuH7O DXzbv1FCWWk/w4ftV2S6jI96vPy4Y/n1POUK36lr24L2xOoqz2awOuE9I362deIO+67tvbdS AncrsRRnJBpqMRcVJwIAoz5g8DECAAA= Sender: linux-samsung-soc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-samsung-soc@vger.kernel.org X-Spam-Status: No, score=-7.5 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_HI, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP When CPU topology is specified in device tree, cpu_logical_map() does not return core ID anymore, but rather full MPIDR value. This breaks existing calculation of PMU register offsets on Exynos SoCs. This patch fixes the problem by adjusting the code to use only core ID bits of the value returned by cpu_logical_map() to allow CPU topology to be specified in device tree on Exynos SoCs. Signed-off-by: Tomasz Figa --- arch/arm/mach-exynos/hotplug.c | 10 ++++++---- arch/arm/mach-exynos/platsmp.c | 31 ++++++++++++++++++------------- 2 files changed, 24 insertions(+), 17 deletions(-) diff --git a/arch/arm/mach-exynos/hotplug.c b/arch/arm/mach-exynos/hotplug.c index 7e0f31a..8a5f07d 100644 --- a/arch/arm/mach-exynos/hotplug.c +++ b/arch/arm/mach-exynos/hotplug.c @@ -92,11 +92,13 @@ static inline void cpu_leave_lowpower(void) static inline void platform_do_lowpower(unsigned int cpu, int *spurious) { + u32 mpidr = cpu_logical_map(cpu); + u32 core_id = MPIDR_AFFINITY_LEVEL(mpidr, 0); + for (;;) { - /* make cpu1 to be turned off at next WFI command */ - if (cpu == 1) - __raw_writel(0, S5P_ARM_CORE_CONFIGURATION(1)); + /* Turn the CPU off on next WFI instruction. */ + __raw_writel(0, S5P_ARM_CORE_CONFIGURATION(core_id)); /* * here's the WFI @@ -106,7 +108,7 @@ static inline void platform_do_lowpower(unsigned int cpu, int *spurious) : : "memory", "cc"); - if (pen_release == cpu_logical_map(cpu)) { + if (pen_release == core_id) { /* * OK, proper wakeup, we're done */ diff --git a/arch/arm/mach-exynos/platsmp.c b/arch/arm/mach-exynos/platsmp.c index 7b7de4b..e08b2c5 100644 --- a/arch/arm/mach-exynos/platsmp.c +++ b/arch/arm/mach-exynos/platsmp.c @@ -89,7 +89,9 @@ static void exynos_secondary_init(unsigned int cpu) static int exynos_boot_secondary(unsigned int cpu, struct task_struct *idle) { unsigned long timeout; - unsigned long phys_cpu = cpu_logical_map(cpu); + u32 mpidr = cpu_logical_map(cpu); + u32 core_id = MPIDR_AFFINITY_LEVEL(mpidr, 0); + u32 reg; /* * Set synchronisation state between this boot processor @@ -102,19 +104,20 @@ static int exynos_boot_secondary(unsigned int cpu, struct task_struct *idle) * the holding pen - release it, then wait for it to flag * that it has been released by resetting pen_release. * - * Note that "pen_release" is the hardware CPU ID, whereas + * Note that "pen_release" is the hardware CPU core ID, whereas * "cpu" is Linux's internal ID. */ - write_pen_release(phys_cpu); + write_pen_release(core_id); - if (!(__raw_readl(S5P_ARM_CORE_STATUS(1)) & S5P_CORE_LOCAL_PWR_EN)) { + reg = __raw_readl(S5P_ARM_CORE_STATUS(core_id)); + if (!(reg & S5P_CORE_LOCAL_PWR_EN)) { __raw_writel(S5P_CORE_LOCAL_PWR_EN, - S5P_ARM_CORE_CONFIGURATION(1)); + S5P_ARM_CORE_CONFIGURATION(core_id)); timeout = 10; /* wait max 10 ms until cpu1 is on */ - while ((__raw_readl(S5P_ARM_CORE_STATUS(1)) + while ((__raw_readl(S5P_ARM_CORE_STATUS(core_id)) & S5P_CORE_LOCAL_PWR_EN) != S5P_CORE_LOCAL_PWR_EN) { if (timeout-- == 0) break; @@ -146,10 +149,10 @@ static int exynos_boot_secondary(unsigned int cpu, struct task_struct *idle) * Try to set boot address using firmware first * and fall back to boot register if it fails. */ - if (call_firmware_op(set_cpu_boot_addr, phys_cpu, boot_addr)) - __raw_writel(boot_addr, cpu_boot_reg(phys_cpu)); + if (call_firmware_op(set_cpu_boot_addr, core_id, boot_addr)) + __raw_writel(boot_addr, cpu_boot_reg(core_id)); - call_firmware_op(cpu_boot, phys_cpu); + call_firmware_op(cpu_boot, core_id); arch_send_wakeup_ipi_mask(cpumask_of(cpu)); @@ -215,14 +218,16 @@ static void __init exynos_smp_prepare_cpus(unsigned int max_cpus) * boot register if it fails. */ for (i = 1; i < max_cpus; ++i) { - unsigned long phys_cpu; unsigned long boot_addr; + u32 mpidr; + u32 core_id; - phys_cpu = cpu_logical_map(i); + mpidr = cpu_logical_map(i); + core_id = MPIDR_AFFINITY_LEVEL(mpidr, 0); boot_addr = virt_to_phys(exynos4_secondary_startup); - if (call_firmware_op(set_cpu_boot_addr, phys_cpu, boot_addr)) - __raw_writel(boot_addr, cpu_boot_reg(phys_cpu)); + if (call_firmware_op(set_cpu_boot_addr, core_id, boot_addr)) + __raw_writel(boot_addr, cpu_boot_reg(core_id)); } }