From patchwork Tue Apr 22 12:25:01 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Chander Kashyap X-Patchwork-Id: 4031431 Return-Path: X-Original-To: patchwork-linux-samsung-soc@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork1.web.kernel.org (Postfix) with ESMTP id 0F77C9F391 for ; Tue, 22 Apr 2014 12:25:26 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id CE0BF201F4 for ; Tue, 22 Apr 2014 12:25:21 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 8468E2021B for ; Tue, 22 Apr 2014 12:25:17 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S932233AbaDVMZQ (ORCPT ); Tue, 22 Apr 2014 08:25:16 -0400 Received: from mail-pd0-f177.google.com ([209.85.192.177]:47978 "EHLO mail-pd0-f177.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S932195AbaDVMZP (ORCPT ); Tue, 22 Apr 2014 08:25:15 -0400 Received: by mail-pd0-f177.google.com with SMTP id y10so4809418pdj.36 for ; Tue, 22 Apr 2014 05:25:15 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=7xZSNr24G7j987MSqUEZQCTJrjGoTyuyCtSoJeEH6hY=; b=ccec9/Paq9d0OvKUeBmSiqb2qoh4SP+xAe7QzU0iupfScSEujQe+kHm9jlM9uimpex 5DyK1ZQ6ptB/eStQ58SoUNx9Z9wEWHCqN+5CXNxXiK4+jiLCCC1QQpYO2FhDruZegAg8 Butpwg9UaiNmUl2lVcLSvwjwdsGBKb2Hh/YX0HUHB2ElSaD4lPDVCAJTPXRSVdBZBxL2 UftT/6l9/J41GbtTBIWO32vgV7Z8sAmip45pwf1dagn98yIOKFY/WykvfyAFr1Y/Acbl hL6RISyRlvk5tJ0p58gsQQgsMzamvYrcrYfF7jkyMHxMEtX9LeDXSWZmd6s776GqhH84 VeRw== X-Gm-Message-State: ALoCoQnsRCdVVe2xH2IxEj5ZG57IfHDmHyXyvQEj+e2/joYo6a29KRy1zftilgNhXjuRBo4wwxet X-Received: by 10.67.14.231 with SMTP id fj7mr9452705pad.115.1398169515274; Tue, 22 Apr 2014 05:25:15 -0700 (PDT) Received: from localhost.localdomain ([115.113.119.130]) by mx.google.com with ESMTPSA id pr4sm84617389pbb.53.2014.04.22.05.25.12 for (version=TLSv1.1 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Tue, 22 Apr 2014 05:25:14 -0700 (PDT) From: Chander Kashyap To: linux-samsung-soc@vger.kernel.org Cc: kgene.kim@samsung.com, tomasz.figa@gmail.com, Chander Kashyap , Chander Kashyap Subject: [PATCH v5] arm: exynos: generalize power register address calculation Date: Tue, 22 Apr 2014 17:55:01 +0530 Message-Id: <1398169501-7251-1-git-send-email-chander.kashyap@linaro.org> X-Mailer: git-send-email 1.7.9.5 In-Reply-To: <1398068989-9905-1-git-send-email-chander.kashyap@linaro.org> References: <1398068989-9905-1-git-send-email-chander.kashyap@linaro.org> Sender: linux-samsung-soc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-samsung-soc@vger.kernel.org X-Spam-Status: No, score=-7.5 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_HI, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=ham version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Currently status/configuration power register values are hard-coded for cpu1. Make it generic so that it is useful for SoC's with more than two cpus. Signed-off-by: Chander Kashyap Signed-off-by: Chander Kashyap --- changes in v5: 1. Fix typo: enynos_pmu_cpunr -> exynos_pmu_cpunr changes in v4: 1: Dropped changes in platsmp.c and hotplug.c as those are taken care by Tomasz Patches. 2. Converted ENYNOS_PMU_CPUNR macro to static inline function changes in v3: 1. Move cpunr calculation to a macro 2. Changed printk format specifier from unsigned hex to unsigned decimal Changes in v2: 1. Used existing macros for clusterid and cpuid calculation arch/arm/mach-exynos/regs-pmu.h | 18 ++++++++++++++++-- 1 file changed, 16 insertions(+), 2 deletions(-) diff --git a/arch/arm/mach-exynos/regs-pmu.h b/arch/arm/mach-exynos/regs-pmu.h index 4f6a256..f39e78c 100644 --- a/arch/arm/mach-exynos/regs-pmu.h +++ b/arch/arm/mach-exynos/regs-pmu.h @@ -105,8 +105,13 @@ #define S5P_GPS_LOWPWR S5P_PMUREG(0x139C) #define S5P_GPS_ALIVE_LOWPWR S5P_PMUREG(0x13A0) -#define S5P_ARM_CORE1_CONFIGURATION S5P_PMUREG(0x2080) -#define S5P_ARM_CORE1_STATUS S5P_PMUREG(0x2084) +#define S5P_ARM_CORE0_CONFIGURATION S5P_PMUREG(0x2000) +#define S5P_ARM_CORE0_STATUS S5P_PMUREG(0x2004) + +#define S5P_ARM_CORE_CONFIGURATION(_cpunr) \ + (S5P_ARM_CORE0_CONFIGURATION + 0x80 * (_cpunr)) +#define S5P_ARM_CORE_STATUS(_cpunr) \ + (S5P_ARM_CORE0_STATUS + 0x80 * (_cpunr)) #define S5P_PAD_RET_MAUDIO_OPTION S5P_PMUREG(0x3028) #define S5P_PAD_RET_GPIO_OPTION S5P_PMUREG(0x3108) @@ -313,4 +318,13 @@ #define EXYNOS5_OPTION_USE_RETENTION (1 << 4) +#include +#define MAX_CPUS_IN_CLUSTER 4 + +static inline unsigned int exynos_pmu_cpunr(unsigned int mpidr) +{ + return ((MPIDR_AFFINITY_LEVEL(mpidr, 1) * MAX_CPUS_IN_CLUSTER) + + MPIDR_AFFINITY_LEVEL(mpidr, 0)); +} + #endif /* __ASM_ARCH_REGS_PMU_H */